Circuit shown in the figure is an $\text{NMOS}$ shift register. All transistors are $\text{NMOS}$ enhancement type with threshold voltage $V_{T}=1 \mathrm{~V}$. Supply used is $\mathrm{V}_{\mathrm{DD}}=5 \mathrm{~V}$
Two non-overlapping clocks $\phi_{1}$ and $\phi_{2}$ are as shown in the figure is and have large pulse widths.
All capacitors are initially discharged and the input $\mathrm{Vin}=0$ volts is applied. If values of capacitors are $C_{1}=2 \; p f$ and $C_{2}=1 \; p f$, find out voltage $V_{C 2}$ on capacitor $C_{2}$ after $\phi_{2}$ goes low. Neglect body-effect on $\mathrm{V}_{\mathrm{T}}$ in your evaluation.