in Analog Circuits recategorized by
51 views
0 votes
0 votes

In the circuit shown below, $Q_{1}$ has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If $V_{cc}$ is $+5 V, X$ and $Y$ are digital signals with $0\: V$ as logic $0$ and $V_{cc}$ as logic $1,$ then the Boolean expression for $Z$ is

  1. $XY$
  2. $\overline{X}Y$
  3. $X\overline{Y}$
  4. $\overline{XY}$
in Analog Circuits recategorized by
by
15.8k points
51 views

Please log in or register to answer this question.

Answer:
Ask
Welcome to GO Electronics, where you can ask questions and receive answers from other members of the community.