Electronis Discussion

0 votes

In the circuit shown below, $Q_{1}$ has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If $V_{cc}$ is $+5 V, X$ and $Y$ are digital signals with $0\: V$ as logic $0$ and $V_{cc}$ as logic $1,$ then the Boolean expression for $Z$ is

- $XY$
- $\overline{X}Y$
- $X\overline{Y}$
- $\overline{XY}$

1,109 questions

52 answers

8 comments

43,031 users