1 votes 1 votes In the figure shown, the output ܻ$Y = AB + \overline{C}\:\:\overline{D}$ is required to be ܻ The gates $G1$ and $G2$ must be, respectively, NOR, OR OR, NAND NAND, OR AND,NAND Number Representations gate2015-ec-2 digital-circuits combinational-circuits logic-gates + – Milicevic3306 asked Mar 27, 2018 • recategorized Nov 21, 2022 by Arjun Milicevic3306 16.0k points 158 views answer comment Share Follow See all 0 reply Please log in or register to add a comment.