Most viewed questions in Analog Circuits / GO Electronics

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1

GATE ECE 2017 Set 1 | Question: 14
The Miller effect in the context of a Common Emitter amplifier explains An increase in the low-frequency cutoff frequency An increase in the high-frequency cutoff frequency A decrease in the low-frequency cutoff frequency A decrease in the high -frequency cutoff frequency

The Miller effect in the context of a Common Emitter amplifier explainsAn increase in the low-frequency cutoff frequencyAn increase in the high-frequency cutoff frequency...

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admin asked Nov 17, 2017

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GATE ECE 2014 Set 3 | Question: 13
The figure shows a half-wave rectifier. The diode $D$ is ideal. The average steady-state current (in Amperes) through the diode is approximately ___________.

The figure shows a half-wave rectifier. The diode $D$ is ideal. The average steady-state current (in Amperes) through the diode is approximately ___________.

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GATE ECE 2017 Set 1 | Question: 11
For a narrow base PNP BJT , the excess minority carrier concentrations($\Delta n_{E}$ for emitter,$\Delta p_{B}$ for base ,$\Delta n_{c}$ for collector) normalized to equilibrium minority carrier concentrations($n_{E0}$ for ... are shown below. Which one of the following biasing modes is the transistor operating in? Forward active Satiration Inverse active Cutoff

For a narrow base PNP BJT , the excess minority carrier concentrations($\Delta n_{E}$ for emitter,$\Delta p_{B}$ for base ,$\Delta n_{c}$ for collector) normalized to eq...

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GATE ECE 2018 | Question: 37
A $dc$ current of $26\:\mu A$ flows through the circuit shown. The diode in the circuit is forward biased and it has an ideality factor of one. At the quiescent point, the diode has a junction capacitance of $0.5\:nF$. Its neutral region ... $\mu A$, correct to one decimal place) is __________.

A $dc$ current of $26\:\mu A$ flows through the circuit shown. The diode in the circuit is forward biased and it has an ideality factor of one. At the quiescent point, th...

gatecse

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gatecse asked Feb 19, 2018

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GATE ECE 2017 Set 1 | Question: 20
Which of the following can be the pole-zero configuration of a phase-lag controller (lag compensator)?

Which of the following can be the pole-zero configuration of a phase-lag controller (lag compensator)?

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admin asked Nov 17, 2017

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GATE ECE 2017 Set 2 | Question: 12
The output $V_0$ of the diode circuit shown in the figure is connected to an averaging DC voltmeter. The reading on the DC voltmeter in Volts, neglecting the voltage drop across the diode, is _________________.

The output $V_0$ of the diode circuit shown in the figure is connected to an averaging DC voltmeter. The reading on the DC voltmeter in Volts, neglecting the voltage drop...

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admin asked Nov 23, 2017

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7

GATE ECE 2020 | Question: 18
In the circuit shown below, all the components are ideal. If $V_{i}$ is $+2\:V$, the current $I_{o}$ sourced by the op-amp is __________ $\text{mA}$.

In the circuit shown below, all the components are ideal. If $V_{i}$ is $+2\:V$, the current $I_{o}$ sourced by the op-amp is __________ $\text{mA}$.

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GATE ECE 2017 Set 2 | Question: 38
Two n-channel MOSFETs, T1 and T2, are identical in all respects except that the width of T2 is double that of T1. Both the transistors are biased in the saturation region of operation, but the gate overdrive voltage ($V_{GS}-V_{TH}$ ... $2g_{m1}$ $8I_{D1}$ and $4g_{m1}$ $4I_{D1}$ and $4g_{m1}$ $4I_{D1}$ and $2g_{m1}$

Two n-channel MOSFETs, T1 and T2, are identical in all respects except that the width of T2 is double that of T1. Both the transistors are biased in the saturation region...

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admin asked Nov 25, 2017

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GATE ECE 2016 Set 3 | Question: 15
In the astable multivibrator circuit shown in the figure, the frequency of oscillation (in kHz) at the output pin $3$ is _______

In the astable multivibrator circuit shown in the figure, the frequency of oscillation (in kHz) at the output pin $3$ is _______

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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GATE ECE 2018 | Question: 32
A $2\times 2$ ROM array is built with the help of diodes as shown in the circuit below. Here $W0$ and $W1$ are signals that select the word lines and $B0$ and $B1$ are signals that are output of the sense amps based on the stored data corresponding to the ... $\begin{bmatrix} 1 &0 \\ 1&0 \end{bmatrix}$ $\begin{bmatrix} 1 &1 \\ 0&0 \end{bmatrix}$

A $2\times 2$ ROM array is built with the help of diodes as shown in the circuit below. Here $W0$ and $W1$ are signals that select the word lines and $B0$ and $B1$ are si...

gatecse

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gatecse asked Feb 19, 2018

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11

GATE ECE 2016 Set 3 | Question: 37
The injected excess electron concentration profile in the base region of an $npn$ BJT, biased in the active region, is linear, as shown in the figure. If the area of the emitter-base junction is $0.001\:cm^2 ,\mu_n=800cm^2/(V-s)$ in the ... is _________ (Given: thermal voltage $V_T=26 \: mV$ at room temperature, electronic charge $ q=1.6\times10^{-19}C$)

The injected excess electron concentration profile in the base region of an $npn$ BJT, biased in the active region, is linear, as shown in the figure. If the area of the ...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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12

GATE ECE 2020 | Question: 33
The base of an $\text{npn BJT T1}$ has a linear doping profile $N_{B}\left ( x \right )$ as shown below. The base of another $\text{npn BJT T2}$ has a uniform doping $N_{B}$ of $10^{17}cm^{-3}$. All other parameters are identical for both the ... $\text{T1}$. approximately $2.5$ times that of $\text{T1}$. approximately $0.7$ times that of $\text{T1}$.

The base of an $\text{npn BJT T1}$ has a linear doping profile $N_{B}\left ( x \right )$ as shown below. The base of another $\text{npn BJT T2}$ has a uniform doping $N_...

go_editor

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go_editor asked Feb 13, 2020

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13

GATE ECE 2016 Set 1 | Question: 17
The output of the combinational circuit given below is $A+B+C$ $A(B+C)$ $B(C+A)$ $C(A+B)$

The output of the combinational circuit given below is $A+B+C$$A(B+C)$$B(C+A)$$C(A+B)$

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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14

GATE ECE 2017 Set 1 | Question: 12
For the operational amplifier circuit shown, the output saturation voltage are $\pm 15 \:V$. The upper and lower threshold voltages for the circuit are,respectively, $+ 5 \: V$ and $– 5 V$ $+ 7 \: V$ and $– 3 \: V$ $+ 3 \: V$ and $- 7 \: V$ $+ 3 \: V$ and $– 3 \: V$

For the operational amplifier circuit shown, the output saturation voltage are $\pm 15 \:V$. The upper and lower threshold voltages for the circuit are,respectively,$+ 5 ...

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admin asked Nov 17, 2017

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15

GATE ECE 2016 Set 3 | Question: 41
In the circuit shown in the figure , the channel length modulation of all transistors is non-zero $(\lambda\neq0)$. Also, all transistors operate in saturation and have negligible body effect .The ac small signal voltage gain ($V_o/V_{in}$ ... $-g_{m1}(r_{o1}\mid\mid \left (\frac{1}{gm3}\mid\mid r_{o3})\mid\mid r_{o2} \right )$

In the circuit shown in the figure , the channel length modulation of all transistors is non-zero $(\lambda\neq0)$. Also, all transistors operate in saturation and have n...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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16

GATE ECE 2019 | Question: 40
In the circuits shown the threshold voltage of each $\text{nMOS}$ transistor is $0.6\:V.$ Ignoring the effect of channel length modulation and body bias. the values of $\text{Vout}1$ and $\text{Vout} 2,$ respectively, in volts, are $1.8$ and $1.2$ $2.4$ and $2.4$ $1.8$ and $2.4$ $2.4$ and $1.2$

In the circuits shown the threshold voltage of each $\text{nMOS}$ transistor is $0.6\:V.$ Ignoring the effect of channel length modulation and body bias. the values of $\...

Arjun

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Arjun asked Feb 12, 2019

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17

GATE ECE 2016 Set 2 | Question: 38
Consider a long-channel $NMOS$ transistor with source and body connected together. Assume that the electron mobility is independent of $V_{GS}$ and $V_{DS}.$ ... $and$ $g_{d}=\frac{\partial I_{D}}{\partial V_{DS}}$ The threshold voltage (in volts) of the transistor is _________

Consider a long-channel $NMOS$ transistor with source and body connected together. Assume that the electron mobility is independent of $V_{GS}$ and $V_{DS}.$ Given,$g_{m}...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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18

GATE ECE 2018 | Question: 38
An op-amp based circuit is implemented as shown below. In the above circuit, assume the op-amp to be ideal. The voltage (in volts, correct to one decimal place) at node $A$, connected to the negative input of the op-amp as indicated in the figure is ________.

An op-amp based circuit is implemented as shown below. In the above circuit, assume the op-amp to be ideal. The voltage (in volt...

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gatecse asked Feb 19, 2018

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19

GATE ECE 2017 Set 1 | Question: 41
For the circuit shown, assume that the NMOS transistor is in saturation. Its threshold voltage $V_{tn}=1V$ and its transconductance parameter $\mu_{n}C_{ox}\big(\frac{W}{L}\big)=1 \: mA/V^{2}$.Neglect channel length modulation and body bias effects. Under these conditions, the drain current $I_{D}$ in $mA$ is ________.

For the circuit shown, assume that the NMOS transistor is in saturation. Its threshold voltage $V_{tn}=1V$ and its transconductance parameter $\mu_{n}C_{ox}\big(\frac{W}{...

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20

GATE ECE 2014 Set 1 | Question: 14
In the following circuit employing pass transistor logic, all NMOS transistors are identical with a threshold voltage of $1\: V.$ Ignoring the body-effect, the output voltage at $P,Q$ and $R$ are, $4\: V, 3\:V,2\:V$ $5\: V, 5\:V,5\:V$ $4\: V, 4\:V,4\:V$ $5\: V, 4\:V,3\:V$

In the following circuit employing pass transistor logic, all NMOS transistors are identical with a threshold voltage of $1\: V.$ Ignoring the body-effect, the output vol...

Milicevic3306

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Milicevic3306 asked Mar 25, 2018

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21

GATE ECE 2015 Set 3 | Question: 35
An npn BJT having reverse saturation current $I_{S} = 10^{-15}\:A$ is biased in the forward active region with $V_{BE} = 700\: mV.$ The thermal voltage $(V_{T})$ is $25\: mV$ and the current gain $(β)$ may vary from $50$ to $150$ due to manufacturing variations. The maximum emitter current $(\text{in}\: \mu A)$ is ________.

An npn BJT having reverse saturation current $I_{S} = 10^{-15}\:A$ is biased in the forward active region with $V_{BE} = 700\: mV.$ The thermal voltage $(V_{T})$ is $25\:...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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22

GATE ECE 2014 Set 3 | Question: 14
An analog voltage in the range $0$ to $8$ V is divided in $16$ equal intervals for conversion to $4$-bit digital output. The maximum quantization error (in V) is __________

An analog voltage in the range $0$ to $8$ V is divided in $16$ equal intervals for conversion to $4$-bit digital output. The maximum quantization error (in V) is ________...

Milicevic3306

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Milicevic3306 asked Mar 26, 2018

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23

GATE ECE 2017 Set 2 | Question: 42
In the voltage reference circuit shown in the figure, the op-amp is ideal and the transistors $Q_1, Q_2, \dots ,Q_{32}$ are identical in all respects and have infinitely large values of common-emitter current gain $(\beta)$. The collector current $(Ic)$ ... is $0.7$ V and the thermal voltage $V_T = 26$ mV. The output voltage $V_{out}$ (in volts) is ______________

In the voltage reference circuit shown in the figure, the op-amp is ideal and the transistors $Q_1, Q_2, \dots ,Q_{32}$ are identical in all respects and have infinitely...

admin

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admin asked Nov 25, 2017

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24

GATE ECE 2016 Set 3 | Question: 14
Consider the circuit shown in the figure. Assuming $V_{EE1} = V_{EE2} = 0.7$ volt, the value of the dc voltage $V_{C2}$(in volt) is _______

Consider the circuit shown in the figure. Assuming $V_{EE1} = V_{EE2} = 0.7$ volt, the value of the dc voltage $V_{C2}$(in volt) is _______

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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25

GATE ECE 2017 Set 1 | Question: 15
A good transconductance amplifier should have high input resistance and low output resistance low input resistance and high output resistance high input and output resistances low input and output resistances

A good transconductance amplifier should havehigh input resistance and low output resistancelow input resistance and high output resistancehigh input and output resistanc...

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admin asked Nov 17, 2017

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26

GATE ECE 2020 | Question: 35
For the $\text{BJT}$ in the amplifier shown below, $V_{BE}=0.7V,\:kT/q=26\:mV$. Assume that $\text{BJT}$ output resistance $(r_{o})$ is very high and the base current is negligible. The capacitors are also assumed to be short circuited at signal frequencies. The ... The low frequency voltage gain $v_{o}/v_{i}$ of the amplifier is $-89.42$ $-128.21$ $-178.85$ $-256.42$

For the $\text{BJT}$ in the amplifier shown below, $V_{BE}=0.7V,\:kT/q=26\:mV$. Assume that $\text{BJT}$ output resistance $(r_{o})$ is very high and the base current is ...

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go_editor asked Feb 13, 2020

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27

GATE ECE 2015 Set 2 | Question: 11
If the circuit shown has to function as a clamping circuit, then which one of the following conditions should be satisfied for the sinusoidal signal of period $T?$ $RC \ll T$ $RC = 0.35\: T$ $RC \approx T$ $RC \gg T$

If the circuit shown has to function as a clamping circuit, then which one of the following conditions should be satisfied for the sinusoidal signal of period $T?$$RC \l...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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28

GATE ECE 2015 Set 3 | Question: 10
If the base width in a bipolar junction transistor is doubled, which one of the following statements will be TRUE? Current gain will increase Unity gain frequency will increase Emitter-base junction capacitance will increase Early Voltage will increase

If the base width in a bipolar junction transistor is doubled, which one of the following statements will be TRUE? Current gain will increase Unity gain frequency will in...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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29

GATE ECE 2018 | Question: 36
For the circuit given in the figure, the magnitude of the loop current (in amperes, correct to three decimal places) $0.5$ second after closing the switch is _______.

For the circuit given in the figure, the magnitude of the loop current (in amperes, correct to three decimal places) $0.5$ second after closing the switch is _______.

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gatecse asked Feb 19, 2018

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30

GATE ECE 2014 Set 4 | Question: 37
Consider the common-collector amplifier in the figure (bias circuitry ensures that the transistor operates in forward active region, but has been omitted for simplicity). Let $I_C$ be the collector current, $V_{BE}$ be the base-emitter voltage and $V_T$ be the ... of values of $R_E$? $g_mR_E <<1$ $I_CR_E>>V_T$ $g_mr_o>>1$ $V_{BE}>>V_T$

Consider the common-collector amplifier in the figure (bias circuitry ensures that the transistor operates in forward active region, but has been omitted for simplicity)....

Milicevic3306

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Milicevic3306 asked Mar 26, 2018

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31

GATE ECE 2016 Set 1 | Question: 34
In the circuit shown in the figure, the maximum power (in watt) delivered to the resistor $R$ is _______

In the circuit shown in the figure, the maximum power (in watt) delivered to the resistor $R$ is _______

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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32

GATE ECE 2016 Set 1 | Question: 16
The block diagram of a frequency synthesizer consisting of a Phase Locked Loop (PLL) and a divide-by-$N$ counter (comprising $\div 2, \div 4, \div 8, \div 16$ outputs) is sketched below. The synthesizer is excited with a $5$ kHz signal (Input $1$). The free-running frequency ... $160 \: kHz, 80 \: kHz, 40 \: kHz, 20 \: kHz$

The block diagram of a frequency synthesizer consisting of a Phase Locked Loop (PLL) and a divide-by-$N$ counter (comprising $\div 2, \div 4, \div 8, \div 16$ outputs) is...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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33

GATE ECE 2017 Set 2 | Question: 41
In the circuit shown, transistors $Q_1$ and $Q_2$ are biased at a collector current of $2.6$ mA. Assuming that transistor current gains are sufficiently large to assume collector current equal to emitter current and thermal voltage of $26$ mV, the magnitude of voltage gain $V_0/V_s$ in the mid-band frequency range is __________(up to second decimal place).

In the circuit shown, transistors $Q_1$ and $Q_2$ are biased at a collector current of $2.6$ mA. Assuming that transistor current gains are sufficiently large to assume c...

admin

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admin asked Nov 25, 2017

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34

GATE ECE 2014 Set 1 | Question: 12
In the ac equivalent circuit shown in the figure, if $i_{in}$ is the input current and $R_{F}$ is very large, the type of feedback is voltage-voltage feedback voltage-current feedback current-voltage feedback current-current feedback

In the ac equivalent circuit shown in the figure, if $i_{in}$ is the input current and $R_{F}$ is very large, the type of feedback isvoltage-voltage feedbackvoltage-curre...

Milicevic3306

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Milicevic3306 asked Mar 25, 2018

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35

GATE ECE 2016 Set 2 | Question: 15
Which one of the following statements is correct about an ac-coupled common-emitter amplifier operating in the mid-band region? The device parasitic capacitances behave like open circuits, whereas coupling and bypass capacitances ... The device parasitic capacitances behave like short circuits, whereas coupling and bypass capacitances behave like open circuits.

Which one of the following statements is correct about an ac-coupled common-emitter amplifier operating in the mid-band region?The device parasitic capacitances behave li...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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36

GATE ECE 2014 Set 4 | Question: 39
For the common collector amplifier shown in the figure, the BJT has high $\beta$, negligible $V_{CE(sat)}$, and $V_{BE}=0.7 \: V$. The maximum undistorted peak-to-peak output voltage $v_o$ (in Volts) is __________

For the common collector amplifier shown in the figure, the BJT has high $\beta$, negligible $V_{CE(sat)}$, and $V_{BE}=0.7 \: V$. The maximum undistorted peak-to-peak ou...

Milicevic3306

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Milicevic3306 asked Mar 26, 2018

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37

GATE ECE 2015 Set 1 | Question: 41
The circuit shown in the figure has an ideal opamp. The oscillation frequency and the condition to sustain the oscillations, respectively, are $\frac{1}{CR}$ and $R_1=R_2 \\ $ $\frac{1}{CR}$ and $R_1=4R_2 \\ $ $\frac{1}{2CR}$ and $R_1=R_2 \\ $ $\frac{1}{2CR}$ and $R_1=4R_2 $

The circuit shown in the figure has an ideal opamp. The oscillation frequency and the condition to sustain the oscillations, respectively, are$\frac{1}{CR}$ and $R_1=R_2 ...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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38

GATE ECE 2015 Set 2 | Question: 42
In the ac equivalent circuit shown, the two BJTs are biased in active region and have identical parameters with $\beta \gg 1$. The open circuit small signal voltage gain is approximately _______.

In the ac equivalent circuit shown, the two BJTs are biased in active region and have identical parameters with $\beta \gg 1$. The open circuit small signal voltage gain ...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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39

GATE ECE 2016 Set 2 | Question: 6
In the circuit shown below, $V_{s}$ is a constant voltage source and $I_{L}$ is a constant current load. The value of $I_{L}$ that maximizes the power absorbed by the constant current load is $\frac{V_{S}}{4R} \\$ $\frac{V_{S}}{2R} \\$ $\frac{V_{S}}{R} \\$ $\infty$

In the circuit shown below, $V_{s}$ is a constant voltage source and $I_{L}$ is a constant current load. The value of $I_...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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40

GATE ECE 2017 Set 1 | Question: 42
The amplifier circuit shown in the figure is implemented using a compensated operational amplifier (op-amp), and has an open-loop voltage gain, $A_{0}=10^{5}V/V$ and an open-loop cut-off frequency, $f_{c}=8Hz$. The voltage gain of the amplifier at $15$ kHz, in V/V, is____________.

The amplifier circuit shown in the figure is implemented using a compensated operational amplifier (op-amp), and has an open-loop voltage gain, $A_{0}=10^{5}V/V$ and an o...

admin

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admin asked Nov 17, 2017