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Most viewed questions in Analog Circuits
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81
GATE ECE 2017 Set 2 | Question: 37
For a particular intensity of incident light on a silicon $pn$ junction solar cell, the photocurrent density $(J_L)$ is $2.5 mA/cm^2$ and the open-circuit voltage ($V_{oc}$) is $0.451$ V. Consider thermal voltage ($V_T$) to ... the incident light is increased by $20$ times, assuming that the temperature remains unchanged, $V_{oc}$ (in volts) will be ____________
For a particular intensity of incident light on a silicon $pn$ junction solar cell, the photocurrent density $(J_L)$ is $2.5 mA/cm^2$ and the open-circuit voltage ($V_{oc...
admin
46.4k
points
106
views
admin
asked
Nov 25, 2017
Analog Circuits
gate2017-ec-2
p-n-junction
numerical-answers
analog-circuits
+
–
0
votes
0
answers
82
GATE ECE 2015 Set 2 | Question: 39
The diode in the circuit given below has $V_{ON} = 0.7\:V$ but is ideal otherwise. The current $(\text{in}\: mA)$ in the $4\: k\Omega$ resistor is _______.
The diode in the circuit given below has $V_{ON} = 0.7\:V$ but is ideal otherwise. The current $(\text{in}\: mA)$ in the $4\: k\Omega$ resistor is _______.
Milicevic3306
16.0k
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105
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Milicevic3306
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Mar 27, 2018
Analog Circuits
gate2015-ec-2
numerical-answers
analog-circuits
diodes
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0
votes
0
answers
83
GATE ECE 2014 Set 1 | Question: 38
In the circuit shown the op-amp has finite input impedance, infinite voltage gain, and zero input offset voltage. The output voltage $V_{out}$ is $-I_{2}(R_{1} + R_{2})$ $I_{2}R_{2}$ $I_{1}R_{2}$ $-I_{1}(R_{1} + R_{2})$
In the circuit shown the op-amp has finite input impedance, infinite voltage gain, and zero input offset voltage. The output voltage $V_{out}$ is $-I_{2}(R_{1} + R_{2})$$...
Milicevic3306
16.0k
points
105
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Milicevic3306
asked
Mar 25, 2018
Analog Circuits
gate2014-ec-1
op-amps
analog-circuits
electronic-devices
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0
votes
0
answers
84
GATE ECE 2014 Set 3 | Question: 38
Assuming that the Op-amp in the circuit shown is ideal, $V_{o}$ is given by $\frac{5}{2}V_{1}-3V_{2} \\$ $2V_{1}-\frac{5}{2}V_{2} \\$ $-\frac{3}{2}V_{1}+\frac{7}{2}V_{2} \\$ $-3V_{1}+\frac{11}{2}V_{2}$
Assuming that the Op-amp in the circuit shown is ideal, $V_{o}$ is given by $\frac{5}{2}V_{1}-3V_{2} \\$$2V_{1}-\frac{...
Milicevic3306
16.0k
points
104
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Milicevic3306
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Mar 26, 2018
Analog Circuits
gate2014-ec-3
analog-circuits
op-amps
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0
votes
0
answers
85
GATE ECE 2013 | Question: 4
In a forward biased $pn$ junction diode, the sequence of events that best describes the mechanism of current flow is injection, and subsequent diffusion and recombination of minority carriers injection, and subsequent drift and ... , and subsequent diffusion and generation of minority carriers extraction, and subsequent drift and recombination of minority carriers
In a forward biased $pn$ junction diode, the sequence of events that best describes the mechanism of current flow is injection, and subsequent diffusion and recombination...
Milicevic3306
16.0k
points
104
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Milicevic3306
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Mar 25, 2018
Analog Circuits
gate2013-ec
analog-circuits
diodes
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0
votes
0
answers
86
GATE ECE 2018 | Question: 35
For the circuit given in the figure, the voltage $V_{c}$ (in volts) across the capacitor is $1.25\sqrt{2}\sin\left ( 5t-0.25\pi \right )$ $1.25\sqrt{2}\sin\left ( 5t-0.125\pi \right )$ $2.5\sqrt{2}\sin\left ( 5t-0.25\pi \right )$ $2.5\sqrt{2}\sin\left ( 5t-0.125\pi \right )$
For the circuit given in the figure, the voltage $V_{c}$ (in volts) across the capacitor is $1.25\sqrt{2}\sin\left ( 5t-0.25\pi \...
gatecse
1.6k
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104
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gatecse
asked
Feb 19, 2018
Analog Circuits
gate2018-ec
analog-circuits
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0
votes
0
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87
GATE ECE 2016 Set 1 | Question: 18
What is the voltage $V_{out}$ in the following circuit ? $0 V$ ($\mid V_T$ of PMOS$\mid$ + $V_T$ of NMOS)$/2$ Switching threshold of inverter $V_{DD}$
What is the voltage $V_{out}$ in the following circuit ?$0 V$($\mid V_T$ of PMOS$\mid$ + $V_T$ of NMOS)$/2$Switching threshold of inverter$V_{DD}$
Milicevic3306
16.0k
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103
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Milicevic3306
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Mar 27, 2018
Analog Circuits
gate2016-ec-1
analog-circuits
pmos
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0
votes
0
answers
88
GATE ECE 2015 Set 3 | Question: 11
In the circuit shown in the figure, the BJT has a current gain $(\beta)$ of $50.$ For an emitter-base voltage ܸ $V_{EB} = 600\: mV,$ the emitter-collector voltage $V_{EC}$ (in Volts) is _______.
In the circuit shown in the figure, the BJT has a current gain $(\beta)$ of $50.$ For an emitter-base voltage ܸ $V_{EB} = 600\: mV,$ the emitter-collector voltage $V_{EC...
Milicevic3306
16.0k
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103
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Milicevic3306
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Mar 27, 2018
Analog Circuits
gate2015-ec-3
numerical-answers
analog-circuits
bipolar-junction-transistor
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0
votes
0
answers
89
GATE ECE 2020 | Question: 44
In the voltage regulator shown below, $V_{1}$ is the unregulated imput at $15\:V$. Assume $V_{BE}=0.7\:V$ and the base current is negligible for both the $\text{BJTs}$. If the regulated output $V_{O}$ is $9\:V$, the value of $R_{2}$ is ___________$\Omega$
In the voltage regulator shown below, $V_{1}$ is the unregulated imput at $15\:V$. Assume $V_{BE}=0.7\:V$ and the base current is negligible for both the $\text{BJTs}$. I...
go_editor
1.9k
points
102
views
go_editor
asked
Feb 13, 2020
Analog Circuits
gate2020-ec
numerical-answers
analog-circuits
bipolar-junction-transistor
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0
votes
0
answers
90
GATE ECE 2016 Set 1 | Question: 22
A superheterodyne receiver operates in the frequency range of $58$ MHz – $68$ MHz. The intermediate frequency $f_{IF}$ and local oscillator frequency $f_{LO}$ are chosen such that $f_{IF} \leq f_{LO}$. It is required that the image frequencies fall outside the $58$ MHz – $68$ MHz band. The minimum required $f_{IF}$ (in MHz) is _________
A superheterodyne receiver operates in the frequency range of $58$ MHz – $68$ MHz. The intermediate frequency $f_{IF}$ and local oscillator frequency $f_{LO}$ are cho...
Milicevic3306
16.0k
points
102
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Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2016-ec-1
numerical-answers
analog-circuits
oscillator
+
–
0
votes
0
answers
91
GATE ECE 2017 Set 2 | Question: 40
Assuming that transistors $M_1$ and $M_2$ are identical and have a threshold voltage of $1$ V, the state of transistors $M_1$ and $M_2$ are respectively Saturation, Saturation Linear, Linear Linear, Saturation Saturation, Linear
Assuming that transistors $M_1$ and $M_2$ are identical and have a threshold voltage of $1$ V, the state of transistors $M_1$ and $M_2$ are respectivelySaturation, Satura...
admin
46.4k
points
102
views
admin
asked
Nov 25, 2017
Analog Circuits
gate2017-ec-2
transistor
analog-circuits
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–
0
votes
0
answers
92
GATE ECE 2016 Set 2 | Question: 45
In the feedback system shown below $G\left ( s \right )=\frac{1}{\left ( s^{2}+2s \right )}$. The step response of the closed-loop system should have minimum settling time and have no overshoot. The required value of gain $k$ to achieve this is __________
In the feedback system shown below $G\left ( s \right )=\frac{1}{\left ( s^{2}+2s \right )}$. The step response of the closed-loop system should have minimum settling tim...
Milicevic3306
16.0k
points
101
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Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2016-ec-2
numerical-answers
analog-circuits
feedback
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0
votes
0
answers
93
GATE ECE 2014 Set 4 | Question: 38
A BJT in a common-base configuration is used to amplify a signal received by a $50 \Omega$ antenna. Assume $kT/q=25 \: mV$. The value of the collector bias current (in mA) required to match the input impedance of the amplifier to the impedance of the antenna is __________.
A BJT in a common-base configuration is used to amplify a signal received by a $50 \Omega$ antenna. Assume $kT/q=25 \: mV$. The value of the collector bias current (in mA...
Milicevic3306
16.0k
points
100
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Milicevic3306
asked
Mar 26, 2018
Analog Circuits
gate2014-ec-4
numerical-answers
bjt-and-mosfet-amplifiers
analog-circuits
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–
0
votes
0
answers
94
GATE ECE 2014 Set 3 | Question: 37
In the circuit shown, the silicon BJT has $\beta = 50$. Assume $V_{BE}= 0.7 \: V$ and $V_{CE(sat)}= 0.2 \: V$. Which one of the following statements is correct? For $R_{C}= 1$ $k$\Omega$, the BJT operates in the saturation region For $R_{ ... $k$\Omega$, the BJT operates in the cut-off region For $R_{C}= 20$ $k$\Omega$, the BJT operates in the linear region
In the circuit shown, the silicon BJT has $\beta = 50$. Assume $V_{BE}= 0.7 \: V$ and $V_{CE(sat)}= 0.2 \: V$. Which one of the following statements is correct? ...
Milicevic3306
16.0k
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100
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Milicevic3306
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Mar 26, 2018
Analog Circuits
gate2014-ec-3
bipolar-junction-transistor
analog-circuits
+
–
0
votes
0
answers
95
GATE ECE 2015 Set 3 | Question: 18
Consider a four-point moving average filter defined by the equation $y[n] = \displaystyle{}\sum _{i=0}^{3}\alpha_{i}\:x[n-i].$ ... $\alpha_{1} = \alpha_{2} = 0;\:\alpha_{0} = \alpha_{3}$
Consider a four-point moving average filter defined by the equation $y[n] = \displaystyle{}\sum _{i=0}^{3}\alpha_{i}\:x[n-i].$ The condition on the filter coefficients t...
Milicevic3306
16.0k
points
98
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
analog-circuits
filters
+
–
0
votes
0
answers
96
GATE ECE 2017 Set 1 | Question: 13
A good transconductance amplifier should have High input resistance and low output resistance Low input resistance and high output resistance High input and output resistance Low input and output resistance
A good transconductance amplifier should haveHigh input resistance and low output resistanceLow input resistance and high output resistanceHigh input and output resistanc...
admin
46.4k
points
97
views
admin
asked
Nov 17, 2017
Analog Circuits
gate2017-1mosfet
amplifier
+
–
0
votes
0
answers
97
GATE ECE 2014 Set 1 | Question: 32
A periodic variable $x$ is shown in the figure as a function of time. The root-mean-square (rms) value of $x$ is _______.
A periodic variable $x$ is shown in the figure as a function of time. The root-mean-square (rms) value of $x$ is _______.
Milicevic3306
16.0k
points
92
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Milicevic3306
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Mar 25, 2018
Analog Circuits
gate2014-ec-1
numerical-answers
analog-circuits
rms
+
–
0
votes
0
answers
98
GATE ECE 2014 Set 4 | Question: 6
The circuit shown in the figure represents a voltage controlled voltage source voltage controlled current source current controlled current source current controlled voltage source
The circuit shown in the figure represents avoltage controlled voltage sourcevoltage controlled current sourcecurrent controlled current sourcecurrent controlled voltage ...
Milicevic3306
16.0k
points
90
views
Milicevic3306
asked
Mar 26, 2018
Analog Circuits
gate2014-ec-4
analog-circuits
+
–
0
votes
0
answers
99
GATE ECE 2012 | Question: 13
The diodes and capacitors in the circuit shown are ideal. The voltage $v(t)$ across the diode $D1$ is $\cos(\omega t)-1$ $\sin(\omega t)$ $1-\cos(\omega t)$ $1-\sin(\omega t)$
The diodes and capacitors in the circuit shown are ideal. The voltage $v(t)$ across the diode $D1$ is$\cos(\omega t)-1$$\sin(\omega t)$$1-\cos(\omega t)$$1-\sin(\omega t)...
Milicevic3306
16.0k
points
90
views
Milicevic3306
asked
Mar 25, 2018
Analog Circuits
gate2012-ec
analog-circuits
+
–
0
votes
0
answers
100
GATE ECE 2015 Set 3 | Question: 39
In the circuit shown, assume that the opamp is ideal. If the gain $(v_{0} / v_{in})$ is $–12,$ the value of $R\: (\text{in}\: k\Omega)$ is _____.
In the circuit shown, assume that the opamp is ideal. If the gain $(v_{0} / v_{in})$ is $–12,$ the value of $R\: (\text{in}\: k\Omega)$ is _____.
Milicevic3306
16.0k
points
89
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
analog-circuits
op-amps
+
–
0
votes
0
answers
101
GATE ECE 2014 Set 2 | Question: 39
For the MOSFETs shown in the figure, the threshold voltage $\mid V_{t} \mid= 2$ V and $K= \frac{1}{2}\mu C_{ox} ( \frac{W}{L} ) = 0.1 \: mA/V^{2}$. The value of $I_{D}$ (in mA) is _______________ .
For the MOSFETs shown in the figure, the threshold voltage $\mid V_{t} \mid= 2$ V and $K= \frac{1}{2}\mu C_{ox} ( \frac{W}{L} ) = 0.1 \: mA/V^{2}$. The value of $I_{D}$ ...
Milicevic3306
16.0k
points
89
views
Milicevic3306
asked
Mar 26, 2018
Analog Circuits
gate2014-ec-2
numerical-answers
analog-circuits
mosfet
+
–
0
votes
0
answers
102
GATE ECE 2012 | Question: 44
The voltage gain $A_v$ of the circuit shown below is $\mid A_v \mid\approx 200$ $\mid A_v\mid \approx 100$ $ \mid A_v \mid \approx 20$ $\mid A_v \mid \approx 10$
The voltage gain $A_v$ of the circuit shown below is$\mid A_v \mid\approx 200$$\mid A_v\mid \approx 100$$ \mid A_v \mid \approx 20$$\mid A_v \mid \approx 10$
Milicevic3306
16.0k
points
89
views
Milicevic3306
asked
Mar 25, 2018
Analog Circuits
gate2012-ec
analog-circuits
+
–
0
votes
0
answers
103
GATE ECE 2012 | Question: 30
The feedback system shown below oscillates at $2\:rad/s$ when $K=2$ and $a=0.75$ $K=3$ and $a=0.75$ $K=4$ and $a=0.5$ $K=2$ and $a=0.5$
The feedback system shown below oscillates at $2\:rad/s$ when$K=2$ and $a=0.75$$K=3$ and $a=0.75$$K=4$ and $a=0.5$$K=2$ and $a=0.5$
Milicevic3306
16.0k
points
88
views
Milicevic3306
asked
Mar 25, 2018
Analog Circuits
gate2012-ec
analog-circuits
oscillator
+
–
0
votes
0
answers
104
GATE ECE 2015 Set 3 | Question: 13
In the circuit shown, assume that diodes $D_{1}$ and $D_{2}$ are ideal. In the steady state condition, the average voltage $V_{ab}$ (in Volts) across the $0.5\: \mu F$ capacitor is ______.
In the circuit shown, assume that diodes $D_{1}$ and $D_{2}$ are ideal. In the steady state condition, the average voltage $V_{ab}$ (in Volts) across the $0.5\: \mu F$ ca...
Milicevic3306
16.0k
points
86
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
numerical-answers
analog-circuits
+
–
0
votes
0
answers
105
GATE ECE 2015 Set 2 | Question: 12
In the circuit shown, $V_{0} = V_{0A}$ for switch $SW$ in position $A$ and $V_{0} = V_{0B}$ for $SW$ in position $B$. Assume that the opamp is ideal. The value of $\dfrac{V_{0B}}{V_{0A}}$ is ___________.
In the circuit shown, $V_{0} = V_{0A}$ for switch $SW$ in position $A$ and $V_{0} = V_{0B}$ for $SW$ in position $B$. Assume that the opamp is ideal. The value of $\dfrac...
Milicevic3306
16.0k
points
86
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-2
numerical-answers
analog-circuits
op-amps
+
–
0
votes
0
answers
106
GATE ECE 2016 Set 1 | Question: 40
An ideal opamp has voltage sources $V_1, V_3, V_5, \dots, V_{N-1}$ connected to the non-inverting input and $V_2, V_4, V_6, \dots, V_N$ connected to the inverting input as shown in the figure below $(+V_{CC}= 15$ volt, $ - V_{CC} = - 15$ volt ... $N$ approaches infinity, the output voltage (in volt) is _________
An ideal opamp has voltage sources $V_1, V_3, V_5, \dots, V_{N-1}$ connected to the non-inverting input and $V_2, V_4, V_6, \dots, V_N$ connected to the inverting input a...
Milicevic3306
16.0k
points
83
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2016-ec-1
numerical-answers
analog-circuits
op-amps
+
–
0
votes
0
answers
107
GATE ECE 2014 Set 2 | Question: 11
The feedback topology in the amplifier circuit ( the base bias circuit is not shown for simplicity) in the figure is voltage shunt feedback current series feedback current shunt feedback voltage series feedback
The feedback topology in the amplifier circuit ( the base bias circuit is not shown for simplicity) in the figure is ...
Milicevic3306
16.0k
points
83
views
Milicevic3306
asked
Mar 26, 2018
Analog Circuits
gate2014-ec-2
analog-circuits
control-systems
+
–
0
votes
0
answers
108
GATE ECE 2015 Set 1 | Question: 34
A MOSFET in saturation has a drain current of $1$ mA for $V_{DS} =0.5 \: V$. If the channel length modulation coefficient is $0.05 \: V^{-1}$, the output resistance (in $k \Omega$) of the MOSFET is ___________.
A MOSFET in saturation has a drain current of $1$ mA for $V_{DS} =0.5 \: V$. If the channel length modulation coefficient is $0.05 \: V^{-1}$, the output resistance (in $...
Milicevic3306
16.0k
points
82
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-1
numerical-answers
analog-circuits
mosfet
+
–
0
votes
0
answers
109
GATE ECE 2015 Set 2 | Question: 8
The $2$-port admittance matrix of the circuit shown is given by $\begin{bmatrix}0.3 &0.2 \\0.2 &0.3 \end{bmatrix}$ $\begin{bmatrix} 15&5 \\5 &15 \end{bmatrix}$ $\begin{bmatrix} 3.33&5 \\5 &3.33 \end{bmatrix}$ $\begin{bmatrix} 0.3&0.4 \\0.4 &0.3 \end{bmatrix}$
The $2$-port admittance matrix of the circuit shown is given by$\begin{bmatrix}0.3 &0.2 \\0.2 &0.3 \end{bmatrix}$$\begin{bmatrix} 15&5 \\5 &15 \end{bmatrix}$$\begin{bmatr...
Milicevic3306
16.0k
points
81
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-2
analog-circuits
+
–
0
votes
0
answers
110
GATE ECE 2015 Set 2 | Question: 30
An $LC$ tank circuit consists of an ideal capacitor $C$ connected in parallel with a coil of inductance $L$ having an internal resistance $R.$ The resonant frequency of the tank circuit is $\dfrac{1}{2\pi \sqrt{LC}}$ ... $\dfrac{1}{2\pi \sqrt{LC}}\left(1-R^{2}\dfrac{C}{L}\right)$
An $LC$ tank circuit consists of an ideal capacitor $C$ connected in parallel with a coil of inductance $L$ having an internal resistance $R.$ The resonant frequency of t...
Milicevic3306
16.0k
points
81
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-2
analog-circuits
tank-circuits
differential-equations
+
–
0
votes
0
answers
111
GATE ECE 2012 | Question: 51
In the three dimensional view of a silicon n-channel MOS transistor shown below, $\delta=20\:nm$. The transistor is of width $1\: \mu m$. The depletion width formed at every p-n junction is $10\:nm$. The relative permittivities of $Si$ and $SiO_2$, respectively, are ... $2\:fF$ $7\:fF$ $2\:pF$ $7\:pF$
In the three dimensional view of a silicon n-channel MOS transistor shown below, $\delta=20\:nm$. The transistor is of width $1\: \mu m$. The depletion width formed at ev...
Milicevic3306
16.0k
points
79
views
Milicevic3306
asked
Mar 25, 2018
Analog Circuits
gate2012-ec
analog-circuits
mos-transistor
+
–
0
votes
0
answers
112
GATE ECE 2012 | Question: 29
The input $x(t)$ and output $y(t)$ of a system are related as $y(t)=\underset{-\infty}{\int}x(\tau)\cos(3\tau)d\tau$. The system is time-invariant and stable stable and not time-invariant time-invariant and not stable not time-invariant and not stable
The input $x(t)$ and output $y(t)$ of a system are related as $y(t)=\underset{-\infty}{\int}x(\tau)\cos(3\tau)d\tau$. The system istime-invariant and stablestable and not...
Milicevic3306
16.0k
points
78
views
Milicevic3306
asked
Mar 25, 2018
Analog Circuits
gate2012-ec
analog-circuits
+
–
0
votes
0
answers
113
GATE ECE 2015 Set 3 | Question: 8
At very high frequencies, the peak output voltage $V_{0}$ (in Volts) is _______.
At very high frequencies, the peak output voltage $V_{0}$ (in Volts) is _______.
Milicevic3306
16.0k
points
76
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
numerical-answers
analog-circuits
+
–
0
votes
0
answers
114
GATE ECE 2014 Set 2 | Question: 37
The diode in the circuit shown has $V_{on}$= 0.7$ Volts but is ideal otherwise. If $V_{i}= 5 \sin ( \omega t )$Volts, the minimum and maximum values of $V_{o}$ (in Volts ) are, respectively, $-5$ and $2.7$ $2.7$ and $5$ $-5$ and $3.85$ $1.3$ and $5$
The diode in the circuit shown has $V_{on}$$= 0.7$ Volts but is ideal otherwise. If $V_{i}= 5 \sin ( \omega t )$Volts, the minimum and maximum values of $V_{o}$ (in Volts...
Milicevic3306
16.0k
points
75
views
Milicevic3306
asked
Mar 26, 2018
Analog Circuits
gate2014-ec-2
analog-circuits
+
–
0
votes
0
answers
115
GATE ECE 2015 Set 3 | Question: 41
In the circuit shown, assume that the diodes $D1$ and $D2$ are ideal. The average value of voltage $V_{ab}\: (\text{in Volts}),$ across terminals $‘a’$ and $‘b’$ is _________.
In the circuit shown, assume that the diodes $D1$ and $D2$ are ideal. The average value of voltage $V_{ab}\: (\text{in Volts}),$ across terminals $‘a’$ and $‘b’$ ...
Milicevic3306
16.0k
points
74
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
numerical-answers
analog-circuits
diodes
+
–
0
votes
0
answers
116
GATE ECE 2012 | Question: 33
Assuming both the voltage sources are in phase, the value of $R$ for which maximum power is transferred from circuit $A$ to circuit $B$ is $0.8\:\Omega$ $1.4\:\Omega$ $2\:\Omega$ $2.8\:\Omega$
Assuming both the voltage sources are in phase, the value of $R$ for which maximum power is transferred from circuit $A$ to circuit $B$ is$0.8\:\Omega$$1.4\:\Omega$$2\:\O...
Milicevic3306
16.0k
points
74
views
Milicevic3306
asked
Mar 25, 2018
Analog Circuits
gate2012-ec
analog-circuits
+
–
0
votes
0
answers
117
GATE ECE 2015 Set 2 | Question: 41
For the voltage regulator circuit shown, the input voltage $(V_{in})$ is $20 V \pm 20\%$ and the regulated output voltage $(V_{out})$ is $10\: V.$ Assume the opamp to be ideal. For a load $R_L$ drawing $200\: mA,$ the maximum power dissipation in $Q_{1}\:\text{(in Watts)}$ is ________.
For the voltage regulator circuit shown, the input voltage $(V_{in})$ is $20 V \pm 20\%$ and the regulated output voltage $(V_{out})$ is $10\: V.$ Assume the opamp to be ...
Milicevic3306
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Analog Circuits
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op-amps
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118
GATE ECE 2015 Set 1 | Question: 39
For the NMOSFET in the circuit shown, the threshold voltage is $V_{th}$, where $V_{th}>0$. The source voltage $V_{SS}$ is varied from $0$ to $V_{DD}$. Neglecting the channel length modulation, the drain current $I_D$ as a function of $V_{SS}$ is represented by
For the NMOSFET in the circuit shown, the threshold voltage is $V_{th}$, where $V_{th}>0$. The source voltage $V_{SS}$ is varied from $0$ to $V_{DD}$. Neglecting the chan...
Milicevic3306
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Mar 27, 2018
Analog Circuits
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119
GATE ECE 2015 Set 1 | Question: 40
In the circuit shown, assume that the opamp is ideal. The bridge output voltage $V_0$ (in mV) for $\delta=0.05$ is __________
In the circuit shown, assume that the opamp is ideal. The bridge output voltage $V_0$ (in mV) for $\delta=0.05$ is __________
Milicevic3306
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Analog Circuits
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op-amps
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120
GATE ECE 2014 Set 1 | Question: 36
A depletion type $N$-channel MOSFET is biased in its linear region for use as a voltage controlled resistor. Assume threshold voltage $V_{TH} = -0.5\:V,V_{GS} = 2.0\:V,V_{DS} = 5\:V,\:W/L = 100,C_{ox} = 10^{-8}\:F/cm^{2}$ and $\mu_{n} = 800\:cm^{2}/V$-$s.$ The value of the resistance of the voltage controlled resistor (in $\Omega)$ is _______.
A depletion type $N$-channel MOSFET is biased in its linear region for use as a voltage controlled resistor. Assume threshold voltage $V_{TH} = -0.5\:V,V_{GS} = 2.0\:V,V_...
Milicevic3306
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Mar 25, 2018
Analog Circuits
gate2014-ec-1
numerical-answers
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mosfet
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