Recent questions in Number Representations

2 votes
1 answer
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2 votes
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The logic function implemented by the circuit below is (ground implies a logic $\text{“0”})$$\text{F=AND(P,Q})$$\text{F=OR(P,Q})$$\text{F=XNOR(P,Q})$$\text{F=XOR(P,Q}...
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15
The functionality implemented by the circuit below is$2$-to-$1$ multiplexer $4$-to-$1$ multiplexer$7$-to-$1$ multiplexer$6$-to-$1$ multiplexer
1 votes
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19
In the figure shown, the output ܻ$Y = AB + \overline{C}\:\:\overline{D}$ is required to be ܻ The gates $G1$ and $G2$ must be, respectively,NOR, OROR, NANDNAND, ORAND,NA...
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20
A mod-$n$ counter using a synchronous binary up-counter with synchronous clear input is shown in the figure. The value of $n$ is _______.
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21
The figure shows a binary counter with synchronous clear input. With the decoding logic shown, the counter works as a mod-$2$ counter mod-$4$ counter mod-$5$ counter mod-...
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24
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27
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29
Five JK flip-flops are cascaded to form the circuit shown in Figure. Clock pulses at a frequency of $1\: MHz$ are applied as shown. The frequency $(\text{in}\:kHz)$ of th...
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31
The state transition diagram for the logic circuit shown is
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33
Consider the given circuit.In the circuit, the race arounddoes not occuroccurs when $\text{CLK}=0$occurs when $\text{CLK}=1$ and $A=B=1$occurs when $\text{CLK}=1$ and $A=...
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40
For the circuit shown in the figure, P and Q are the inputs and Y is the output.The logic implemented by the circuit isXNOR XORNOROR