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Recent questions tagged mosfet
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GATE ECE 2020 | Question: 36
An enhancement $\text{MOSFET}$ of threshold voltage $3\:V$ is being used in the sample and hold circuit given below. Assume that the substrate of the $\text{MOS}$ device is connected to $-10\:V$. If the input voltage $V_{1}$ lies between $\pm 10\:V,$ the minimum and the maximum ... $\text{10 V and -10 V}$. $\text{13 V and -7 V}$. $\text{10 V and -13 V}$.
An enhancement $\text{MOSFET}$ of threshold voltage $3\:V$ is being used in the sample and hold circuit given below. Assume that the substrate of the $\text{MOS}$ device ...
go_editor
1.9k
points
134
views
go_editor
asked
Feb 13, 2020
Electronic Devices
gate2020-ec
electronic-devices
mosfet
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–
0
votes
0
answers
2
GATE ECE 2019 | Question: 50
Consider a long-channel MOSFET with a channel length $1\:\mu m$ and width $10\: \mu m.$ The device parameters are acceptor concentration $N_{A}=5 \times 10^{16}\: cm^{-3},$ electron mobility $\mu_{n}=800\: cm^{2}/V-s,$ ... _______ $mA$ (rounded off to two decimal places.). $[\varepsilon_{0}=8.854 \times 10^{-14}F/cm, \varepsilon_{si} =11.9]$
Consider a long-channel MOSFET with a channel length $1\:\mu m$ and width $10\: \mu m.$ The device parameters are acceptor concentration $N_{A}=5 \times 10^{16}\: cm^{-3}...
Arjun
6.5k
points
110
views
Arjun
asked
Feb 12, 2019
Electronic Devices
gate2019-ec
numerical-answers
electronic-devices
mosfet
+
–
0
votes
0
answers
3
GATE ECE 2016 Set 1 | Question: 12
Consider the following statements for a metal oxide semiconductor field effect transistor (MOSFET): As channel length reduces,OFF-state current increases. As channel length reduces,output resistance increases. As channel length reduces,threshold voltage remains constant. As channel ... . Which of the above statements are INCORRECT? P and Q P and S Q and R R and S
Consider the following statements for a metal oxide semiconductor field effect transistor (MOSFET):As channel length reduces,OFF-state current increases.As channel length...
Milicevic3306
16.0k
points
152
views
Milicevic3306
asked
Mar 27, 2018
Digital Circuits
gate2016-ec-1
digital-circuits
semiconductor
mosfet
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–
0
votes
0
answers
4
GATE ECE 2016 Set 1 | Question: 37
Consider an $n$-channel metal oxide semiconductor field effect transistor (MOSFET) with a gate-to-source voltage of $1.8$ V. Assume that $\frac{W}{L}=4$, $\mu_NC_{ox}= 70 \times 10^{-6} AV^{-2}$ ... channel length modulation parameter is $0.09 \: V^{-1}$. In the saturation region, the drain conductance (in micro siemens) is _________
Consider an $n$-channel metal oxide semiconductor field effect transistor (MOSFET) with a gate-to-source voltage of $1.8$ V. Assume that $\frac{W}{L}=4$, $\mu_NC_{ox}= 70...
Milicevic3306
16.0k
points
75
views
Milicevic3306
asked
Mar 27, 2018
Electronic Devices
gate2016-ec-1
numerical-answers
electronic-devices
mosfet
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–
0
votes
0
answers
5
GATE ECE 2015 Set 3 | Question: 9
Which one of the following processes is preferred to form the gate dielectric $(SiO_{2})$ of MOSFETs ? Sputtering Molecular beam epitaxy Wet oxidation Dry oxidation
Which one of the following processes is preferred to form the gate dielectric $(SiO_{2})$ of MOSFETs ? Sputtering Molecular beam epitaxy Wet oxidation Dry oxidation
Milicevic3306
16.0k
points
99
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
analog-circuits
mosfet
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–
0
votes
0
answers
6
GATE ECE 2015 Set 1 | Question: 34
A MOSFET in saturation has a drain current of $1$ mA for $V_{DS} =0.5 \: V$. If the channel length modulation coefficient is $0.05 \: V^{-1}$, the output resistance (in $k \Omega$) of the MOSFET is ___________.
A MOSFET in saturation has a drain current of $1$ mA for $V_{DS} =0.5 \: V$. If the channel length modulation coefficient is $0.05 \: V^{-1}$, the output resistance (in $...
Milicevic3306
16.0k
points
69
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-1
numerical-answers
analog-circuits
mosfet
+
–
0
votes
0
answers
7
GATE ECE 2015 Set 1 | Question: 39
For the NMOSFET in the circuit shown, the threshold voltage is $V_{th}$, where $V_{th}>0$. The source voltage $V_{SS}$ is varied from $0$ to $V_{DD}$. Neglecting the channel length modulation, the drain current $I_D$ as a function of $V_{SS}$ is represented by
For the NMOSFET in the circuit shown, the threshold voltage is $V_{th}$, where $V_{th}>0$. The source voltage $V_{SS}$ is varied from $0$ to $V_{DD}$. Neglecting the chan...
Milicevic3306
16.0k
points
61
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-1
analog-circuits
mosfet
+
–
0
votes
0
answers
8
GATE ECE 2014 Set 3 | Question: 8
In MOSFET fabrication, the channel length is defined during the process of isolation oxide growth channel stop implantation poly-silicon gate patterning lithography step leading to the contact pads
In MOSFET fabrication, the channel length is defined during the process ofisolation oxide growthchannel stop implantationpoly-silicon gate patterninglithography step lead...
Milicevic3306
16.0k
points
85
views
Milicevic3306
asked
Mar 26, 2018
Electronic Devices
gate2014-ec-3
electronic-devices
analog-circuits
mosfet
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–
0
votes
0
answers
9
GATE ECE 2014 Set 3 | Question: 35
The slope of the $I_{D}$ vs. $V_{GS}$ curve of an n-channel MOSEFT in linear regime is $10^{-3}\Omega ^{-1}$ at $V_{DS}= 0.1 \: V$. For the same device, neglecting channel length modulation, the slope of the $\sqrt{I_{D} }$ vs. $V_{GS}$ curve (in $\sqrt{A}/V$) under saturation regime is approximately _________.
The slope of the $I_{D}$ vs. $V_{GS}$ curve of an n-channel MOSEFT in linear regime is $10^{-3}\Omega ^{-1}$ at $V_{DS}= 0.1 \: V$. For the same device, neglecting channe...
Milicevic3306
16.0k
points
94
views
Milicevic3306
asked
Mar 26, 2018
Electronic Devices
gate2014-ec-3
numerical-answers
electronic-devices
mosfet
+
–
0
votes
0
answers
10
GATE ECE 2014 Set 3 | Question: 39
For the MOSFET $M_{1}$ shown in the figure, assume $W/L= 2$, $V_{DD}= 2.0 \: V$, $\mu _{n}C_{ox}= 100\mu A/V^{2}$ and $V_{TH}= 0.5 \: V$. The transistor $M_{1}$ switches from saturation region to linear region when $V_{in}$(in $Volts$) is ____________.
For the MOSFET $M_{1}$ shown in the figure, assume $W/L= 2$, $V_{DD}= 2.0 \: V$, $\mu _{n}C_{ox}= 100\mu A/V^{2}$ and $V_{TH}= 0.5 \: V$. The transistor $M_{1}$ switches ...
Milicevic3306
16.0k
points
75
views
Milicevic3306
asked
Mar 26, 2018
Electronic Devices
gate2014-ec-3
numerical-answers
electronic-devices
mosfet
+
–
0
votes
0
answers
11
GATE ECE 2014 Set 2 | Question: 39
For the MOSFETs shown in the figure, the threshold voltage $\mid V_{t} \mid= 2$ V and $K= \frac{1}{2}\mu C_{ox} ( \frac{W}{L} ) = 0.1 \: mA/V^{2}$. The value of $I_{D}$ (in mA) is _______________ .
For the MOSFETs shown in the figure, the threshold voltage $\mid V_{t} \mid= 2$ V and $K= \frac{1}{2}\mu C_{ox} ( \frac{W}{L} ) = 0.1 \: mA/V^{2}$. The value of $I_{D}$ ...
Milicevic3306
16.0k
points
80
views
Milicevic3306
asked
Mar 26, 2018
Analog Circuits
gate2014-ec-2
numerical-answers
analog-circuits
mosfet
+
–
0
votes
0
answers
12
GATE ECE 2014 Set 1 | Question: 10
If fixed positive charges are present in the gate oxide of an $n$-channel enhancement type MOSFET, it will lead to a decrease in the threshold voltage channel length modulation an increase in substrate leakage current an increase in accumulation capacitance
If fixed positive charges are present in the gate oxide of an $n$-channel enhancement type MOSFET, it will lead to a decrease in the threshold voltagechannel length modul...
Milicevic3306
16.0k
points
142
views
Milicevic3306
asked
Mar 25, 2018
Analog Circuits
gate2014-ec-1
analog-circuits
mosfet
+
–
0
votes
0
answers
13
GATE ECE 2014 Set 1 | Question: 36
A depletion type $N$-channel MOSFET is biased in its linear region for use as a voltage controlled resistor. Assume threshold voltage $V_{TH} = -0.5\:V,V_{GS} = 2.0\:V,V_{DS} = 5\:V,\:W/L = 100,C_{ox} = 10^{-8}\:F/cm^{2}$ and $\mu_{n} = 800\:cm^{2}/V$-$s.$ The value of the resistance of the voltage controlled resistor (in $\Omega)$ is _______.
A depletion type $N$-channel MOSFET is biased in its linear region for use as a voltage controlled resistor. Assume threshold voltage $V_{TH} = -0.5\:V,V_{GS} = 2.0\:V,V_...
Milicevic3306
16.0k
points
63
views
Milicevic3306
asked
Mar 25, 2018
Analog Circuits
gate2014-ec-1
numerical-answers
analog-circuits
mosfet
+
–
0
votes
0
answers
14
GATE ECE 2013 | Question: 34
The small-signal resistance $(i.e., dV_{B}/dI_{D})$ in $k\Omega$ offered by the $n$-channel $MOSFET\: M$ shown in the figure below, at a bias point of $V_{B} = 2\: V$ is (device data for $M:$ ... $V_{TN} = 1\: V,$ and neglect body effect and channel length modulation effects) $12.5$ $25$ $50$ $100$
The small-signal resistance $(i.e., dV_{B}/dI_{D})$ in $k\Omega$ offered by the $n$-channel $MOSFET\: M$ shown in the figure below, at a bias point of $V_{B} = 2\: V$ is ...
Milicevic3306
16.0k
points
89
views
Milicevic3306
asked
Mar 25, 2018
Electronic Devices
gate2013-ec
electronic-devices
mosfet
+
–
0
votes
0
answers
15
GATE ECE 2017 Set 2 | Question: 38
Two n-channel MOSFETs, T1 and T2, are identical in all respects except that the width of T2 is double that of T1. Both the transistors are biased in the saturation region of operation, but the gate overdrive voltage ($V_{GS}-V_{TH}$ ... $2g_{m1}$ $8I_{D1}$ and $4g_{m1}$ $4I_{D1}$ and $4g_{m1}$ $4I_{D1}$ and $2g_{m1}$
Two n-channel MOSFETs, T1 and T2, are identical in all respects except that the width of T2 is double that of T1. Both the transistors are biased in the saturation region...
admin
46.4k
points
251
views
admin
asked
Nov 25, 2017
Analog Circuits
gate2017-ec-2
mosfet
biasing
analog-circuits
+
–
0
votes
0
answers
16
GATE ECE 2017 Set 2 | Question: 9
An n-channel enhancement mode MOSFET is biased at $V_{GS}$ >$V_{TH}$ and $V_{DS}$ > $(V_{GS}-V_{TH})$, where $V_{GS}$ is the gate-to-source voltage, $V_{DS}$ is the drain-to- ... voltage source with zero output impedance voltage source with non-zero output impedance current source with finite output impedance current source with infinite output impedance
An n-channel enhancement mode MOSFET is biased at $V_{GS}$ >$V_{TH}$ and $V_{DS}$ $(V_{GS}-V_{TH})$, where $V_{GS}$ is the gate-to-source voltage, $V_{DS}$ is the drai...
admin
46.4k
points
88
views
admin
asked
Nov 23, 2017
Electronic Devices
gate2017-ec-2
mosfet
electronic-devices
+
–
0
votes
0
answers
17
GATE ECE 2017 Set 2 | Question: 11
Consider an $n$-channel MOSFET having width $W$, length $L$, electron mobility in the channel $\mu _{n}$ and oxide capacitance per unit area $C_{ox}$. If gate-to-source $V_{GS}=0.7$ V, drain-to-source voltage $V_{DS}=0.1 V$, $\mu _{n}C_{ox}=100 \mu A/V^{2}$, threshold voltage $V_{TH}=0.3V$ and $(W/L)=50$, then the transconductance $g_{m}$ (in mA/V) is __________.
Consider an $n$-channel MOSFET having width $W$, length $L$, electron mobility in the channel $\mu _{n}$ and oxide capacitance per unit area $C_{ox}$. If gate-to-source $...
admin
46.4k
points
94
views
admin
asked
Nov 23, 2017
Electronic Devices
gate2017-ec-2
mosfet
numerical-answers
electronic-devices
+
–
0
votes
0
answers
18
GATE ECE 2017 Set 1 | Question: 20
Which of the following can be the pole-zero configuration of a phase-lag controller (lag compensator)?
Which of the following can be the pole-zero configuration of a phase-lag controller (lag compensator)?
admin
46.4k
points
261
views
admin
asked
Nov 17, 2017
Analog Circuits
gate2017-ec-1
mosfet
analog-circuits
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