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Recent questions tagged opamps
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1
GATE ECE 2020  Question: 18
In the circuit shown below, all the components are ideal. If $V_{i}$ is $+2\:V$, the current $I_{o}$ sourced by the opamp is __________ $\text{mA}$.
asked
Feb 13, 2020
in
Analog Circuits
by
jothee
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1.8k
points)

36
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gate2020ec
numericalanswers
opamps
analogcircuits
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2
GATE ECE 2016 Set 2  Question: 41
An opamp has a finite open loop voltage gain of $100$. Its input offset voltage $V_{ios}(=+5mV)$ is modeled as shown in the circuit below. The amplifier is ideal in all other respects. $V_{\text{input}}$ is $25 \: mV$. The output voltage (in millivolts) is _________
asked
Mar 28, 2018
in
Analog Circuits
by
Milicevic3306
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15.8k
points)

10
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gate2016ec2
numericalanswers
analogcircuits
opamps
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3
GATE ECE 2016 Set 1  Question: 14
The following signal $V_i$ of peak voltage $8 \: V$ is applied to the noninverting terminal of an ideal Opamp.The transistor has $V_{EE}=0.7 \: V$, $\beta=100; \: V_{LED}=1.5 \: V$, $V_{CC}=10 \: V$ and $ – V_{CC}= – 10 \:V$. The number of times the LED glows is ________
asked
Mar 28, 2018
in
Analog Circuits
by
Milicevic3306
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15.8k
points)

20
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gate2016ec1
numericalanswers
analogcircuits
opamps
0
votes
0
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4
GATE ECE 2016 Set 1  Question: 40
An ideal opamp has voltage sources $V_1, V_3, V_5, \dots, V_{N1}$ connected to the noninverting input and $V_2, V_4, V_6, \dots, V_N$ connected to the inverting input as shown in the figure below $(+V_{CC}= 15$ volt, $  V_{CC} =  15$ volt ... $N$ approaches infinity, the output voltage (in volt) is _________
asked
Mar 28, 2018
in
Analog Circuits
by
Milicevic3306
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15.8k
points)

8
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gate2016ec1
numericalanswers
analogcircuits
opamps
0
votes
0
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5
GATE ECE 2015 Set 3  Question: 12
In the circuit shown using an ideal opamp, the $3$dB cutoff frequency (in Hz) is _______.
asked
Mar 28, 2018
in
Analog Circuits
by
Milicevic3306
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15.8k
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17
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gate2015ec3
numericalanswers
analogcircuits
opamps
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6
GATE ECE 2015 Set 3  Question: 39
In the circuit shown, assume that the opamp is ideal. If the gain $(v_{0} / v_{in})$ is $–12,$ the value of $R\: (\text{in}\: k\Omega)$ is _____.
asked
Mar 28, 2018
in
Analog Circuits
by
Milicevic3306
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15.8k
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17
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gate2015ec3
analogcircuits
opamps
0
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0
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7
GATE ECE 2015 Set 2  Question: 12
In the circuit shown, $V_{0} = V_{0A}$ for switch $SW$ in position $A$ and $V_{0} = V_{0B}$ for $SW$ in position $B$. Assume that the opamp is ideal. The value of $\dfrac{V_{0B}}{V_{0A}}$ is ___________.
asked
Mar 28, 2018
in
Analog Circuits
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Milicevic3306
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15.8k
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12
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gate2015ec2
numericalanswers
analogcircuits
opamps
0
votes
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8
GATE ECE 2015 Set 2  Question: 13
In the bistable circuit shown, the ideal opamp has saturation levels of $\pm\: 5\: V.$ The value of $R_{1} \text{(in}\: k\Omega)$ that gives a hysteresis width of $500\: mV$ is ________.
asked
Mar 28, 2018
in
Analog Circuits
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Milicevic3306
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15.8k
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22
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gate2015ec2
numericalanswers
analogcircuits
opamps
0
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9
GATE ECE 2015 Set 2  Question: 40
Assuming that the opamp in the circuit shown below is ideal, the output voltage ܸ$V_{o}$ (in volts) is________.
asked
Mar 28, 2018
in
Analog Circuits
by
Milicevic3306
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15.8k
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22
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gate2015ec2
numericalanswers
analogcircuits
opamps
0
votes
0
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10
GATE ECE 2015 Set 2  Question: 41
For the voltage regulator circuit shown, the input voltage $(V_{in})$ is $20 V \pm 20\%$ and the regulated output voltage $(V_{out})$ is $10\: V.$ Assume the opamp to be ideal. For a load $R_L$ drawing $200\: mA,$ the maximum power dissipation in $Q_{1}\:\text{(in Watts)}$ is ________.
asked
Mar 28, 2018
in
Analog Circuits
by
Milicevic3306
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15.8k
points)

14
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gate2015ec2
numericalanswers
analogcircuits
opamps
0
votes
0
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11
GATE ECE 2015 Set 1  Question: 40
In the circuit shown, assume that the opamp is ideal. The bridge output voltage $V_0$ (in mV) for $\delta=0.05$ is __________
asked
Mar 28, 2018
in
Analog Circuits
by
Milicevic3306
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15.8k
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12
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gate2015ec1
numericalanswers
analogcircuits
opamps
0
votes
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12
GATE ECE 2015 Set 1  Question: 41
The circuit shown in the figure has an ideal opamp. The oscillation frequency and the condition to sustain the oscillations, respectively, are $\frac{1}{CR}$ and $R_1=R_2 \\ $ $\frac{1}{CR}$ and $R_1=4R_2 \\ $ $\frac{1}{2CR}$ and $R_1=R_2 \\ $ $\frac{1}{2CR}$ and $R_1=4R_2 $
asked
Mar 28, 2018
in
Analog Circuits
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Milicevic3306
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15.8k
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15
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gate2015ec1
analogcircuits
opamps
0
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13
GATE ECE 2014 Set 3  Question: 38
Assuming that the Opamp in the circuit shown is ideal, $V_{o}$ is given by $\frac{5}{2}V_{1}3V_{2} \\$ $2V_{1}\frac{5}{2}V_{2} \\$ $\frac{3}{2}V_{1}+\frac{7}{2}V_{2} \\$ $3V_{1}+\frac{11}{2}V_{2}$
asked
Mar 26, 2018
in
Analog Circuits
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Milicevic3306
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15.8k
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16
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gate2014ec3
analogcircuits
opamps
0
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0
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14
GATE ECE 2014 Set 1  Question: 37
In the voltage regulator circuit shown in the figure, the opamp is ideal. The BJT has $V_{BE} = 0.7\:V$ and $\beta = 100,$ and the zener voltage is $4.7\:V.$ For a regulated output of $9\:V,$ the value of $R$ (in $\Omega)$ is ______.
asked
Mar 26, 2018
in
Analog Circuits
by
Milicevic3306
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15.8k
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19
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gate2014ec1
numericalanswers
analogcircuits
opamps
bipolarjunctiontransistor
0
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0
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15
GATE ECE 2014 Set 1  Question: 38
In the circuit shown the opamp has finite input impedance, infinite voltage gain, and zero input offset voltage. The output voltage $V_{out}$ is $I_{2}(R_{1} + R_{2})$ $I_{2}R_{2}$ $I_{1}R_{2}$ $I_{1}(R_{1} + R_{2})$
asked
Mar 26, 2018
in
Analog Circuits
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Milicevic3306
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15.8k
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12
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gate2014ec1
opamps
analogcircuits
electronicdevices
0
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16
GATE ECE 2018  Question: 38
An opamp based circuit is implemented as shown below. In the above circuit, assume the opamp to be ideal. The voltage (in volts, correct to one decimal place) at node $A$, connected to the negative input of the opamp as indicated in the figure is ________.
asked
Feb 19, 2018
in
Analog Circuits
by
gatecse
(
1.5k
points)

53
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gate2018ec
numericalanswers
analogcircuits
opamps
0
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0
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17
GATE ECE 2017 Set 2  Question: 42
In the voltage reference circuit shown in the figure, the opamp is ideal and the transistors $Q_1, Q_2, \dots ,Q_{32}$ are identical in all respects and have infinitely large values of commonemitter current gain $(\beta)$. The collector current $(Ic)$ ... is $0.7$ V and the thermal voltage $V_T = 26$ mV. The output voltage $V_{out}$ (in volts) is ______________
asked
Nov 25, 2017
in
Analog Circuits
by
admin
(
2.8k
points)

35
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gate2017ec2
opamps
numericalanswers
analogcircuits
0
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0
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18
GATE ECE 2017 Set 1  Question: 42
The amplifier circuit shown in the figure is implemented using a compensated operational amplifier (opamp), and has an openloop voltage gain, $A_{0}=10^{5}V/V$ and an openloop cutoff frequency, $f_{c}=8Hz$. The voltage gain of the amplifier at $15$ kHz, in V/V, is____________.
asked
Nov 17, 2017
in
Analog Circuits
by
admin
(
2.8k
points)

30
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gate2017ec1
numericalanswers
analogcircuits
opamps
0
votes
0
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19
GATE ECE 2017 Set 1  Question: 12
For the operational amplifier circuit shown, the output saturation voltage are $\pm 15 \:V$. The upper and lower threshold voltages for the circuit are,respectively, $+ 5 \: V$ and $– 5 V$ $+ 7 \: V$ and $– 3 \: V$ $+ 3 \: V$ and $ 7 \: V$ $+ 3 \: V$ and $– 3 \: V$
asked
Nov 17, 2017
in
Analog Circuits
by
admin
(
2.8k
points)

49
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gate2017ec1
opamps
amplifier
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