Consider the $\text{CMOS}$ circuit shown in the figure (substrates are connected to their respective sources). The gate width $(W)$ to gate length $(L)$ ratios $\left( \frac{W}{L} \right)$ of the transistors are as shown. Both the transistors have the same gate oxide capacitance per unit area. For the $p\text{MOSFET},$ the threshold voltage is $ – 1 \; \text{V}$ and the mobility of holes is $40 \; \frac{\text{cm}^{2}}{\text{V.s}}.$ For the $n\text{MOSFET},$ the threshold voltage is $1V$ and the mobility of electrons is $300\dfrac{cm^2}{V.s}$. The steady state output voltage $V_{o}$ is _____________.
- equal to $0 \; \text{V}$
- more than $2\; \text{V}$
- less than $2 \; \text{V}$
- equal to $2 \; \text{V}$