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In the modulo-$6$ ripple counter shown in the given figure, the output of the $2$-input gate is used to clear the J-K flip-flops.


The $2$-input gate is

  1. a NAND gate
  2. a NOR gate
  3. an OR gate
  4. an AND gate
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We need to check for the state CBA → 110 at which we need to clear the inputs (CBA → 000)….

let us represent the output of 2 input gate to be X….

Note : we are passing the complements of C and B to the 2 input GATE….

when C' = 1 and B' = 0 , X should be 1

when C' = 0 and B' = 1 , X should be 1

when C' = 1 and B' = 1 , X should be 1

But only when C' = 0 and B' = 0 , X should be 0 (Since this is the case where C=1 and B=1  and also the clear inputs (active low) are low)

The output represents the OR Gate…

Answer : Option C
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