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​​​​​​​The propagation delays of the $\text{XOR}$ gate, $\text{AND}$ gate and multiplexer $\text{(MUX)}$ in the circuit shown in the figure are $4\:ns$, $2\:ns$ and $1\:ns$, respectively.

If all the inputs $\text{P, Q, R, S and T}$ are applied simultaneously and held constant, the maximum propagation delay of the circuit is

  1. $3\:ns$
  2. $5\:ns$
  3. $6\:ns$
  4. $7\:ns$
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