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Recent questions and answers in Digital Circuits

2 votes
1 answer
1
GATE ECE 2010 | Question: 37
Assuming that all flip-flops are in reset condition initially, the count sequence observed at $\text{Q}_\text{A}$ in the circuit shown is $0010111 \ldots$ $0001011 \ldots$ $0101111 \ldots$ $0110100 \ldots$
Assuming that all flip-flops are in reset condition initially, the count sequence observed at $\text{Q}_\text{A}$ in the circuit shown is$0010111 \ldots$$0001011 \ldots$$...
2 votes
1 answer
4
GATE ECE 2011 | Question: 7
The logic function implemented by the circuit below is (ground implies a logic $\text{“0”})$ $\text{F=AND(P,Q})$ $\text{F=OR(P,Q})$ $\text{F=XNOR(P,Q})$ $\text{F=XOR(P,Q})$
The logic function implemented by the circuit below is (ground implies a logic $\text{“0”})$$\text{F=AND(P,Q})$$\text{F=OR(P,Q})$$\text{F=XNOR(P,Q})$$\text{F=XOR(P,Q}...
2 votes
1 answer
11
GATE ECE 2016 Set 3 | Question: 43
Following is the K-map of a Boolean function of five variables $P,Q,R,S$ and $X$ ... $\overline{Q}\:S\:X+\;Q\:\overline{S}\:\overline{X}$ $\overline{Q}\:S+\;Q\overline{S}$
Following is the K-map of a Boolean function of five variables $P,Q,R,S$ and $X$. The minimum sum-of-product (SOP) expression for the function is$\overline{P}\:\overline{...
2 votes
1 answer
12
GATE ECE 2018 | Question: 9
A function $F(A, B, C)$ defined by three Boolean variables $\text{A, B and C}$ when expressed as sum of products is given by $F=\overline{A}\:.\overline{B}\:.\overline{C}+\overline{A}\:.B\:.\overline{C}+A\:.\overline{B}\:.\overline{C}$ ...
A function $F(A, B, C)$ defined by three Boolean variables $\text{A, B and C}$ when expressed as sum of products is given by$$F=\overline{A}\:.\overline{B}\:.\overline{C}...
1 votes
1 answer
13
GATE ECE 2014 Set 2 | Question: 15
The number of bytes required to represent the decimal number $1856357$ in packed BCD (Binary Coded Decimal) form is ___________.
The number of bytes required to represent the decimal number $1856357$ in packed BCD (Binary Coded Decimal) form is ___________.
0 votes
1 answer
14
GATE ECE 2014 Set 2 | Question: 14
For an $n$-variable Boolean function, the maximum number of prime implicants is $2(n-1)$ $n/2$ $2^{n}$ $2^{n-1}$
For an $n$-variable Boolean function, the maximum number of prime implicants is$2(n-1)$$n/2$$2^{n}$$2^{n-1}$
2 votes
1 answer
15
GATE ECE 2010 | Question: 11
Match the logic gates in Column A with their equivalents in Column B. $\text{P-2, Q-4, R-1, S-3}$ $\text{P-4, Q-2, R-1, S-3}$ $\text{P-2, Q-4, R-3, S-1}$ $\text{P-4, Q-2, R-3, S-1}$
Match the logic gates in Column A with their equivalents in Column B.$\text{P-2, Q-4, R-1, S-3}$$\text{P-4, Q-2, R-1, S-3}$$\text{P-2, Q-4, R-3, S-1}$$\text{P-4, Q-2, R-3...
3 votes
1 answer
16
GATE ECE 2021 | Question: 11
​​​​​​​If $(1235)_{x}\:=\:(3033)_{y}$, where $x$ and $y$ indicate the bases of the corresponding numbers, then $x\:=\:7$ and $y\:=\:5$ $x\:=\:8$ and $y\:=\:6$ $x\:=\:6$ and $y\:=\:4$ $x\:=\:9$ and $y\:=\:7$
​​​​​​​If $(1235)_{x}\:=\:(3033)_{y}$, where $x$ and $y$ indicate the bases of the corresponding numbers, then$x\:=\:7$ and $y\:=\:5$$x\:=\:8$ and $y\:=\:6$...
0 votes
0 answers
18
GATE ECE 2021 | Question: 12
​​​​​​Addressing of a $32K\:\times\:16$ memory is realized using a single decoder. The minimum number of $\text{AND}$ gates required for the decoder is $2^{8}$ $2^{32}$ $2^{15}$ $2^{19}$
​​​​​​Addressing of a $32K\:\times\:16$ memory is realized using a single decoder. The minimum number of $\text{AND}$ gates required for the decoder is$2^{8}$...
1 votes
2 answers
21
GATE ECE 2014 Set 1 | Question: 15
The Boolean expression $(X+Y)(X+\overline{Y}) + \overline{(X\;\overline{Y}) + \overline{X}}$ simplifies to $X$ $Y$ $XY$ $X+Y$
The Boolean expression $(X+Y)(X+\overline{Y}) + \overline{(X\;\overline{Y}) + \overline{X}}$ simplifies to$X$$Y$$XY$$X+Y$
0 votes
0 answers
26
GATE ECE 2020 | Question: 19
In an $8085$ microprocessor, the number of address lines required to access a $16$ K byte memory bank is ____________ .
In an $8085$ microprocessor, the number of address lines required to access a $16$ K byte memory bank is ____________ .
0 votes
0 answers
27
GATE ECE 2020 | Question: 20
A $10$-bit D/A converter is calibrated over the full range from $0$ to $10$ V. If the input to the D/A converter is $13 \:A$ (in hex), the output ( rounded off to three decimal places) is __________ $V$.
A $10$-bit D/A converter is calibrated over the full range from $0$ to $10$ V. If the input to the D/A converter is $13 \:A$ (in hex), the output ( rounded off to three d...
0 votes
0 answers
29
GATE ECE 2019 | Question: 14
In the circuit shown, what are the values of $F$ for $EN=0$ and $EN=1,$ respectively? $\text{0 and D}$ $\text{Hi-Z and D}$ $\text{0 and 1}$ $\text{Hi-Z and}$ $ \overline{D}$
In the circuit shown, what are the values of $F$ for $EN=0$ and $EN=1,$ respectively?$\text{0 and D}$$\text{Hi-Z and D}$$\text{0 and 1}$$\text{Hi-Z and}$ $ \overline{D}$
0 votes
0 answers
30
GATE ECE 2019 | Question: 15
In the circuit shown, $A$ and $B$ are the inputs and $F$ is the output. What is the functionality of the circuit? Latch XNOR SRAM Cell XOR
In the circuit shown, $A$ and $B$ are the inputs and $F$ is the output. What is the functionality of the circuit?LatchXNORSRAM CellXOR
0 votes
0 answers
34
GATE ECE 2016 Set 3 | Question: 17
The logic functionality realized by the circuit shown below is $OR$ $XOR$ $NAND$ $AND$
The logic functionality realized by the circuit shown below is $OR$$XOR$$NAND$$AND$
0 votes
0 answers
35
GATE ECE 2016 Set 3 | Question: 18
The minimum number of $2$-input $NAND$ gates required to implement a $2$-input $XOR$ gate is $4$ $5$ $6$ $7$
The minimum number of $2$-input $NAND$ gates required to implement a $2$-input $XOR$ gate is$4$$5$$6$$7$
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