Recent questions tagged combinational-circuits

3 3 votes
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In the circuit shown in the Figure, $A$ and $B$ are logic inputs and $Y$ is the logic output.Which of the following logic operations is realized by the circuit?NORORXORAN...
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A Boolean function, $f(x, y, z)$ with $x$ as MSB and $z$ as LSB is realized by $4: 1$ multiplexer (MUX) with select lines, $\mathrm{S}_{1}$ and $\mathrm{S}_{0}\left(\math...
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Consider the four-variable Boolean function,$f(w, x, y, z)=\sum m(0,2,5,7,8,10,13,14,15)$ with '$w$' as MSB and '$z$' as LSB.Which of the following expressions is/are the...
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A $3$-input majority logic gate has inputs $X, Y$, and $Z$. The output $F$ of the gate is logic '$1$' if two or more of the inputs are logic '$1$'. The output $F$ is logi...
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A full adder and an XOR gate are used to design a digital circuit with inputs $X, Y$, and $Z$, and output $F$, as shown below. The input $Z$ is connected to the carry-in ...
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​​​​For the Boolean function\[F(A, B, C, D)=\sum m(0,2,5,7,8,10,12,13,14,15) \text {, }\]the essential prime implicants are $\_\_\_\_\_\_$.$B D, \bar{B} \bar{D}$$B D, A B...
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In the circuit shown below, $\mathrm{P}$ and $\mathrm{Q}$ are the inputs. The logical function realized by the circuit shown below is$\mathrm{Y}=\mathrm{PQ}$$\mathrm{Y}=\...
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For the circuit shown below, the propagation delay of each $ \mathrm{NAND}$ gate is $1 \mathrm{~ns}$. The critical path delay, in $\text{ns,}$ is______________(rounded of...
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322 views
Consider five distinct binary vectors $X_{1}, \ldots, X_{5}$ each of length $10$. Let\[d_{i j}=\sum_{k=1}^{10}\left(X_{i k} \text { XOR } X_{j k}\right),\](i.e., $d_{i j}...
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471 views
A $2$ bit binary multiplier can be implemented using$2$ inputs $\text{ANDs}$ only$2$ input $\text{XOR s}$ and $4$ input $\text{AND}$ gates onlyTwo $2$ inputs $\text{NORs}...
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494 views
The output of the logic gate in the figure is$0$$1$$\text{A}$$\mathrm{F}$
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The decoding circuit shown in the figure is has been used to generate the active low chip select signal for a microprocessor peripheral. (The address lines are designated...
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464 views
For the $\text{NMOS}$ logic gate shown in the figure is the logic function implemented is$\overline{\mathrm{ABCDE}}$$(\mathrm{AB}+\overline{\mathrm{C}}) \cdot(\overline{\...
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The boolean function $\mathrm{A}+\mathrm{BC}$ is a reduced form of$\mathrm{AB}+\mathrm{BC}$$(\mathrm{A}+\mathrm{B}) \cdot(\mathrm{A}+\mathrm{C})$$\overline{\mathrm{A}} \m...
1 1 vote
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425 views
For the logic circuit shown in the figure is the required input condition $(A, B, C)$ to make the output $(X)=1$ is$1,0,1$$0,0,1$$1,1,1$$0,1,1$
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599 views
For the logic circuit shown in, the simplified Boolean expression for the output $Y$ is$\mathrm{A}+\mathrm{B}+\mathrm{C}$$\mathrm{A}$$\mathrm{B}$$\mathrm{C}$
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352 views
The operating conditions $(O N=1, O F F=0)$ of three pumps $(x, y, z)$ are to be monitored. $x=1$ implies that pump $X$ is on. It is required that the indicator $\text{(L...
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302 views
A one-bit full adder is to be implemented using $8$-to-$1$ multiplexers $\text{(MUX)}$.Write the truth table for sum $\text{(S)}$ and carry to the next stage $\left(\math...
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357
357 views
The logical expresion $y=\mathrm{A}+\overline{\mathrm{A}} \mathrm{B} $ is equivalent to$y=\mathrm{AB}$$y=\overline{\mathrm{A}} \mathrm{B}$$y=\bar{A}+\mathrm{B}$$y=\mathr...
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324
324 views
The minimized form of the logical expression $(\bar{A} \bar{B} \bar{C}+\bar{A} B \bar{C}+\bar{A} B C+A B \bar{C})$ is$\overline{\mathrm{A}} \overline{\mathrm{C}}+\mathrm{...
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356
356 views
For a binary half-subtractor having two inputs $\text{A}$ and $\text{B}$, the correct set of logical expressions for the outputs $\text{D}$ ( = $\text{A}$ minus $\text{B}...
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470
470 views
In a certain application, four inputs $A, B, C, D$ (both true and complement forms available) are fed to logic circuit, producing an output $F$ which operates a relay. Th...
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Consider the following two statements :$\text{Statement 1: A}$ stable multivibrator can be used for generating square wave.$\text{Statement 1: B}$ stable multivibrator c...
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749 views
In the TTL circuit in the figure, $\mathrm{S}_{2}$ to $\mathrm{S}_{0}$ are select lines and $\text{X}_{7}$ to $\text{X}_{0}$ are input lines. $\text{S}_{0}$ and $\text{X}...
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327
327 views
For the digital block shown in the figure the output $\mathrm{Y}=f\left(\mathrm{~S}_{3}, \mathrm{~S}_{2}, \mathrm{~S}_{1}, \mathrm{~S}_{0}\right)$ where $\mathrm{S}_{3}$ ...
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359
359 views
If the input to the digital circuit the figure, consisting of a cascade of $20 \; \mathrm{XOR}$-gates is $\mathrm{X}$, then the output $Y$ is equal to$0$$1$$\overline{X}$...
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776
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The circuit in the figure is has two $\text{CMOS NOR}$-gates. This circuit functions as aflip-flopschmitt triggernonostable multivibratorastable multivibrator
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410 views
Consider the following statements in connection with the CMOS inverter in the figure is where both the MOSFETs are of enhancement type and both have a thresh old voltage ...
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328
328 views
If the input $X_{3}, X_{2}, X_{1}, X_{0}$ to the ROM in the figure are $8-4-2-1$ BCD numbers, then the outputs $Y_{3} Y_{2} Y_{1} Y_{0}$ are gray code numbers$2-4-2-1$ BC...
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304
304 views
The inputs to a digital circuit shown in the figure is are the external signals $A, B$ and $C$.$(\overline{\mathrm{A}}, \overline{\mathrm{B}}$ and $\overline{\mathrm{C}}$...