in Digital Circuits retagged by
56 views
0 votes
0 votes

In the figure shown, the output ܻ$Y = AB + \overline{C}\:\:\overline{D}$ is required to be ܻ The gates $G1$ and $G2$ must be, respectively,

  1. NOR, OR
  2. OR, NAND
  3. NAND, OR
  4. AND,NAND
in Digital Circuits retagged by
by
15.8k points
56 views

Please log in or register to answer this question.

Answer:
Ask
Welcome to GO Electronics, where you can ask questions and receive answers from other members of the community.