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Recent questions tagged logicgates
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GATE ECE 2019  Question: 14
In the circuit shown, what are the values of $F$ for $EN=0$ and $EN=1,$ respectively? $\text{0 and D}$ $\text{HiZ and D}$ $\text{0 and 1}$ $\text{HiZ and}$ $ \overline{D}$
asked
Feb 12, 2019
in
Digital Circuits
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Arjun
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4.4k
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51
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gate2019ec
digitalcircuits
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2
GATE ECE 2019  Question: 15
In the circuit shown, $A$ and $B$ are the inputs and $F$ is the output. What is the functionality of the circuit? Latch XNOR SRAM Cell XOR
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Feb 12, 2019
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Digital Circuits
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Arjun
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4.4k
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66
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gate2019ec
digitalcircuits
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3
GATE ECE 2016 Set 3  Question: 17
The logic functionality realized by the circuit shown below is $OR$ $XOR$ $NAND$ $AND$
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Mar 28, 2018
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Digital Circuits
by
Milicevic3306
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15.8k
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36
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gate2016ec3
digitalcircuits
combinationalcircuits
logicgates
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4
GATE ECE 2016 Set 3  Question: 18
The minimum number of $2$input $NAND$ gates required to implement a $2$input $XOR$ gate is $4$ $5$ $6$ $7$
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Mar 28, 2018
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Digital Circuits
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Milicevic3306
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15.8k
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25
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gate2016ec3
digitalcircuits
combinationalcircuits
logicgates
0
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5
GATE ECE 2016 Set 3  Question: 44
For the circuit shown in the figure, the delays of NOR gates, multiplexers and inverters are $2$ ns, $1.5$ ns and $1$ ns, respectively. If all the inputs $P, Q, R, S$ and $T$ are applied at the same time instant, the maximum propagation delay (in ns) of the circuit is _________
asked
Mar 28, 2018
in
Digital Circuits
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Milicevic3306
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15.8k
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28
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gate2016ec3
numericalanswers
digitalcircuits
combinationalcircuits
logicgates
0
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6
GATE ECE 2015 Set 3  Question: 15
In the circuit shown, diodes $D_{1}, D_{2}$ and $D_{3}$ are ideal, and the inputs $E_{1} , E_{2}$ and $E_{3}$ are $“0\: V”$ for logic $‘0’$ and $“10\: V”$ for logic $‘1’$. What logic gate does the circuit represent? $3$input OR gate $3$input NOR gate $3$input AND gate $3$input XOR gate
asked
Mar 28, 2018
in
Digital Circuits
by
Milicevic3306
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15.8k
points)

20
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gate2015ec3
digitalcircuits
combinationalcircuits
logicgates
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7
GATE ECE 2015 Set 3  Question: 37
A universal logic gate can implement any Boolean function by connecting sufficient number of them appropriately. Three gates are shown. Which one of the following statements is TRUE? Gate $1$ is a universal gate Gate $2$ is a universal gate Gate $3$ is a universal gate None of the gates shown is a universal gate
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Mar 28, 2018
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Digital Circuits
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Milicevic3306
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15.8k
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22
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gate2015ec3
digitalcircuits
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0
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0
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8
GATE ECE 2015 Set 2  Question: 14
In the figure shown, the output ܻ$Y = AB + \overline{C}\:\:\overline{D}$ is required to be ܻ The gates $G1$ and $G2$ must be, respectively, NOR, OR OR, NAND NAND, OR AND,NAND
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Mar 28, 2018
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Digital Circuits
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Milicevic3306
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26
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gate2015ec2
digitalcircuits
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0
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9
GATE ECE 2015 Set 1  Question: 38
A $3$input majority gate is defined by the logic function $M(a,b,c)=ab+bc+ca$. Which one of the following gates is represented by the function $M(\overline{M(a,b,c)}, M(a,b,\overline{c}),c)$? $3$input NAND gate $3$input XOR gate $3$input NOR gate $3$input XNOR gate
asked
Mar 28, 2018
in
Digital Circuits
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Milicevic3306
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15.8k
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14
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gate2015ec1
digitalcircuits
logicgates
0
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0
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10
GATE ECE 2014 Set 4  Question: 15
In the circuit shown in the figure, if $C=0$, the expression for $Y$ is $Y=A \overline{B} + \overline{A}B$ $Y=A+B$ $Y=\overline{A} + \overline{B}$ $Y=A \: B$
asked
Mar 26, 2018
in
Digital Circuits
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Milicevic3306
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15.8k
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22
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gate2014ec4
digitalcircuits
combinationalcircuits
logicgates
0
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11
GATE ECE 2014 Set 1  Question: 40
The output $F$ in the digital logic circuit shown in the figure is $F = \overline{X}\:Y\:Z + X\:\overline{Y}\:Z$ $F = \overline{X}\:Y\:\overline{Z} + X\:\overline{Y}\:\overline{Z}$ $F = \overline{X}\:\overline{Y}\:Z + X\:Y\:Z$ $F = \overline{X}\:\overline{Y}\:\overline{Z} + X\:Y\:Z$
asked
Mar 26, 2018
in
Digital Circuits
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Milicevic3306
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15.8k
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31
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gate2014ec1
digitalcircuits
combinationalcircuits
logicgates
0
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12
GATE ECE 2018  Question: 47
The logic gates shown in the digital circuit below use strong pulldown $\text{nMOS}$ transistors for LOW logic level at the outputs. When the pulldowns are off, highvalue resistors set the output logic levels to HIGH (i.e. the pullups are weak). Note that some nodes ... values of $X_{3}X_{2}X_{1}X_{0}$ (out of the $16$ possible values) that give $Y=1$ is ________.
asked
Feb 19, 2018
in
Digital Circuits
by
gatecse
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1.5k
points)

69
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gate2018ec
numericalanswers
digitalcircuits
combinationalcircuits
logicgates
0
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13
GATE ECE 2018  Question: 8
The logic function $f(X, Y)$ realized by the given circuit is NOR AND NAND XOR
asked
Feb 19, 2018
in
Digital Circuits
by
gatecse
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1.5k
points)

38
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gate2018ec
digitalcircuits
combinationalcircuits
logicgates
+1
vote
0
answers
14
GATE ECE 2017 Set 2  Question: 45
A programmable logic array (PLA) is shown in the figure. The Boolean function $F$ implemented is $\overline{P} \: \overline{Q}R+ \overline{P}QR+P \overline{Q} \: \overline{R}$ $(\overline{P}+\overline{Q}+R)(\overline{P}+Q+R)(P+\overline{Q}+\overline{R})$ ... $(\overline{P}+\overline{Q}+R)(\overline{P}+Q+R)(P+\overline{Q}+R)$
asked
Nov 25, 2017
in
Digital Circuits
by
admin
(
2.8k
points)

94
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gate2017ec2
digitalcircuits
combinationalcircuits
logicgates
0
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15
GATE ECE 2017 Set 2  Question: 15
For the circuit shown in the figure, P and Q are the inputs and Y is the output. The logic implemented by the circuit is XNOR XOR NOR OR
asked
Nov 23, 2017
in
Digital Circuits
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admin
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2.8k
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44
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gate2017ec2
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