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GATE ECE 1997 | Question 4.2
The decoding circuit shown in the figure is has been used to generate the active low chip select signal for a microprocessor peripheral. (The address lines are designated as $\mathrm{AO}$ to $\mathrm{A} 7$ for $\mathrm{l} / \mathrm{O}$ ... $30 \; \mathrm{H}$ to $33 \; \mathrm{H}$ $70 \; \mathrm{H}$ to $73 \; \mathrm{H}$
The decoding circuit shown in the figure is has been used to generate the active low chip select signal for a microprocessor peripheral. (The address lines are designated...
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GATE ECE 1997 | Question 4.3
The following insturctions have been executed by an $8085 \; \mu \mathrm{P}$ ... $6019$ $6379$ $6979$ None of the above
The following insturctions have been executed by an $8085 \; \mu \mathrm{P}$$\begin{array}{cl}\text { ADDRESS (HEX) } & \text { INSTRUCTION } \\ 6010 & \text { LXI H, 8A ...
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GATE ECE 1997 | Question 4.4
A signed integer has been stored in a byte using the $2$'s complement format. We wish to store the same integer in a $16$ bit word. We should copy the original byte to the less significant byte of the word and fill the more ... significant bit of the original byte copy the original byte to the less significant byte as well as the more significant byte of the word
A signed integer has been stored in a byte using the $2$'s complement format. We wish to store the same integer in a $16$ bit word. We shouldcopy the original byte to the...
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GATE ECE 1997 | Question 4.5
A half wave rectifier uses a diode with a forward resistance $\text{Rf}$. The voltage is $\text{V}_\text{m} \sin \omega t$ and the load resistance is $\text{R}_\text{L}$. The $\text{DC}$ ... $\frac{2 \mathrm{Vm}}{\sqrt{\pi}}$ $\frac{\mathrm{V}_{m}}{\mathrm{R}_{\mathrm{L}}}$
A half wave rectifier uses a diode with a forward resistance $\text{Rf}$. The voltage is $\text{V}_\text{m} \sin \omega t$ and the load resistance is $\text{R}_\text{L}$....
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GATE ECE 1997 | Question 4.6
The intrinsic carrier density at $300 \mathrm{~K}$ is $1.5 \times 10^{10}$ / $\mathrm{cm}^{3}$, in silicon. For $n$-type silicon doped to $2.25 \times$ $10^{15}$ atoms $/ \mathrm{cm}^{3}$ ... $n=1.5 \times 10^{10} / \mathrm{cm}^{3}, p=1.5 \times 10^{10} / \mathrm{cm}^{3}$
The intrinsic carrier density at $300 \mathrm{~K}$ is $1.5 \times 10^{10}$ / $\mathrm{cm}^{3}$, in silicon. For $n$-type silicon doped to $2.25 \times$ $10^{15}$ atoms $/...
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GATE ECE 1997 | Question 4.7
For the $\text{NMOS}$ logic gate shown in the figure is the logic function implemented is $\overline{\mathrm{ABCDE}}$ $(\mathrm{AB}+\overline{\mathrm{C}}) \cdot(\overline{\mathrm{D}+\mathrm{E}})$ ... $(\overline{\mathrm{A}+\mathrm{B}}) \cdot \mathrm{C}+\overline{\mathrm{D}} \cdot \overline{\mathrm{E}}$
For the $\text{NMOS}$ logic gate shown in the figure is the logic function implemented is$\overline{\mathrm{ABCDE}}$$(\mathrm{AB}+\overline{\mathrm{C}}) \cdot(\overline{\...
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GATE ECE 1997 | Question 4.8
In a $\text{J-K}$ flip-flip we have $\text{J=Q}$ and $\text{K}=1$. Assuming the flip flop was initially cleared and then clocked for $6$ puleses, the sequence at the $\text{Q}$ output will be $010000$ $011001$ $010010$ $010101$
In a $\text{J-K}$ flip-flip we have $\text{J=Q}$ and $\text{K}=1$. Assuming the flip flop was initially cleared and then clocked for $6$ puleses, the sequence at the $\te...
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GATE ECE 1997 | Question 4.9
The gate delay of an $\text{NMOS}$ inverter is dominated by charge time rather than discharge time because the driver transistor has larger threshold voltage than the load transistor the driver transistor has larger leakage currents compared to the load transistor the load transistor has a smaller $\text{W/L}$ ratio compared to the driver transistor none of the above
The gate delay of an $\text{NMOS}$ inverter is dominated by charge time rather than discharge time becausethe driver transistor has larger threshold voltage than the load...
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GATE ECE 1997 | Question 4.10
The boolean function $\mathrm{A}+\mathrm{BC}$ is a reduced form of $\mathrm{AB}+\mathrm{BC}$ $(\mathrm{A}+\mathrm{B}) \cdot(\mathrm{A}+\mathrm{C})$ $\overline{\mathrm{A}} \mathrm{B}+\mathrm{A} \overline{\mathrm{B}} \mathrm{C}$ $(\mathrm{A}+\mathrm{C}) \cdot \mathrm{B}$
The boolean function $\mathrm{A}+\mathrm{BC}$ is a reduced form of$\mathrm{AB}+\mathrm{BC}$$(\mathrm{A}+\mathrm{B}) \cdot(\mathrm{A}+\mathrm{C})$$\overline{\mathrm{A}} \m...
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GATE ECE 1997 | Question 5.1
In the case of a linear time invariant system (1) Poles in the right half plane implies Exponential decay of output (2) Impulse response zero for $t \leq 0$ implies System is casual No stored energy in the system System is unstable.
In the case of a linear time invariant system(1) Poles in the right half plane implies Exponential decay of output(2) Impulse response zero for $t \leq 0$ impliesSystem i...
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GATE ECE 1997 | Question 5.2
If the Fourier Transform of deterministic signal $\mathrm{g}(\mathrm{t})$ is $\mathrm{G}(f)$, then (1) The Fourier Transform of $g(t-2)$ is $G(f) e^{-j(4 \pi f)}$ (2) The Fourier Transform of $g(t / 2)$ is $G(2 f)$ $2 G(2 f)$ $G(f-2)$
If the Fourier Transform of deterministic signal $\mathrm{g}(\mathrm{t})$ is $\mathrm{G}(f)$, then(1) The Fourier Transform of $g(t-2)$ is$G(f) e^{-j(4 \pi f)}$(2) The Fo...
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GATE ECE 1997 | Question 5.3
(1) An $8$-bit wide $5$ word sequential memory will have $8$ Fixed $\text{‘AND'}$ gates and $4$ programmable $\text{‘OR'}$ gates (2) A $256 \times 4$ $\text{EFROM}$ has Eight $4$ bit shift registers $4$ words of $32$ bits each $8$ address pins and $4$ data pins output
(1) An $8$-bit wide $5$ word sequential memory will have$8$ Fixed $\text{‘AND'}$ gates and $4$ programmable $\text{‘OR'}$ gates(2) A $256 \times 4$ $\text{EFROM}$ has...
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GATE ECE 1997 | Question 5.4
(1) Wave tilt Under-water propagation (2) Faraday Rotation Ground wave propagation Space wave propagation Ionospheric propagation
(1) Wave tiltUnder-water propagation(2) Faraday RotationGround wave propagationSpace wave propagationIonospheric propagation
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GATE ECE 1997 | Question 5.5
While moving data between registers of the $8085$ and the stack (1) a $\text{PUSH}$ instruction Pre increments the stack pointer (2) a $\text{POP}$ instruction Post increments the stack pointer Pre decrements the stack pointer Post decrements the stack pointer
While moving data between registers of the $8085$ and the stack(1) a $\text{PUSH}$ instructionPre increments the stack pointer(2) a $\text{POP}$ instructionPost increment...
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GATE ECE 1997 | Question 5.6
Negative feedback in (1) Voltage series configuration increase input impedance (2) Current shunt configuration decrease input impedance increases closed loop gain leads to oscillation
Negative feedback in(1) Voltage series configurationincrease input impedance(2) Current shunt configurationdecrease input impedanceincreases closed loop gainleads to osci...
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GATE ECE 1997 | Question 6
The figure is shows the block diagram representation of control system. The system in block A has an impulse response $h_{A}(t)=e^{-t} u (t)$. The system in block $B$ has an impulse response $h_{\mathrm{B}}(t)=e^{{-2 f}} u(t)$ ... for which the system becomes unstable Note: \[ \begin{aligned} u (t) &=01 \leq 9 \\ &=1 t>0 \end{aligned} \]
The figure is shows the block diagram representation of control system. The system in block A has an impulse response $h_{A}(t)=e^{-t} u (t)$. The system in block $B$ has...
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GATE ECE 1997 | Question 7
Circuit shown in the figure is an $\text{NMOS}$ shift register. All transistors are $\text{NMOS}$ enhancement type with threshold voltage $V_{T}=1 \mathrm{~V}$. Supply used is $\mathrm{V}_{\mathrm{DD}}=5 \mathrm{~V}$ ... on capacitor $C_{2}$ after $\phi_{2}$ goes low. Neglect body-effect on $\mathrm{V}_{\mathrm{T}}$ in your evaluation.
Circuit shown in the figure is an $\text{NMOS}$ shift register. All transistors are $\text{NMOS}$ enhancement type with threshold voltage $V_{T}=1 \mathrm{~V}$. Supply us...
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GATE ECE 1997 | Question 8
The transistor in the circuit shown in the figure is so biased ($dc$ biasing network is not shown) that the $dc$ collecter current $I_{c}=1 \mathrm{~mA}$. Supply is $V_{cc}=5 \mathrm{~V}$. The network components have following values \[\begin{array}{l ... capacitor across $R_{E}$ is $25 \mu \mathrm{F}$. The bypass capacitor $C_{E}$ is removed leaving $R_{E}$ unbypassed
The transistor in the circuit shown in the figure is so biased ($dc$ biasing network is not shown) that the $dc$ collecter current $I_{c}=1 \mathrm{~mA}$. Supply is $V_{c...
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GATE ECE 1997 | Question 9
$\mathrm{A} \frac{\lambda}{2}$ section of a $600 \; \Omega$ transmission line, short circuited at one end and open circuited at the other end, is shown in the figure is $100 \mathrm{~V} / 75 \; \Omega$ generator is connected at the mid point of the section as shown in the figure. Find voltage at the open circuited end of the line.
$\mathrm{A} \frac{\lambda}{2}$ section of a $600 \; \Omega$ transmission line, short circuited at one end and open circuited at the other end, is shown in the figure is $...
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GATE ECE 1997 | Question 10
In the ciruit of the figure is $\mathrm{R}=100 \; \Omega, \mathrm{L}=20 \; n \mathrm{H}$ and $\mathrm{C}=32 \; \mathrm{pF}$. The circuit is maintained at a temperature of $300 \; \text{K.}$ Derive and plot the power spectral density of the ... the relevant points on the plot with numerical values. (The Boltzmann constant \[ k=1.28 \times 10-23 \mathrm{~J} / \mathrm{K} \]
In the ciruit of the figure is $\mathrm{R}=100 \; \Omega, \mathrm{L}=20 \; n \mathrm{H}$ and $\mathrm{C}=32 \; \mathrm{pF}$.The circuit is maintained at a temperature of ...
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GATE ECE 1997 | Question 11
Consider the circuit given in the figure is using an ideal operational amplifier. The characteristics of the diode are given by the relation $\mathrm{I}=\mathrm{I}_{\mathrm{S}}\left(\frac{\mathrm{V}}{e^{\mathrm{kT}}}-1\right)$ where $V$ is the forward voltage across the ... $\frac{k \mathrm{T}}{q}=25 \mathrm{~mV}$, find the input voltage $V_{i}$, for which $V_{0}=0$.
Consider the circuit given in the figure is using an ideal operational amplifier.The characteristics of the diode are given by the relation $\mathrm{I}=\mathrm{I}_{\mathr...
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GATE ECE 1997 | Question 12
In the circuit shown in the figure is assume that the operational amplifier is ideal and that $\mathrm{V}_{\mathrm{o}}=0 \mathrm{~V}$ initially. The switch is connected first to ' $A$ ' charging $C_{1}$ to the voltage $V$. It is then connected to ... $\mathrm{V}=10 \; \mathrm{mV}$, what is the average rate of change of the output voltage?
In the circuit shown in the figure is assume that the operational amplifier is ideal and that $\mathrm{V}_{\mathrm{o}}=0 \mathrm{~V}$ initially. The switch is connected f...
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GATE ECE 1997 | Question 13
In the cascade amplifier circuit shown in the figure is determine the values of $R_{1}, R_{2}$ and $R_{L}$ such that the quiescent current through the transistors is $1 \mathrm{~mA}$ and the collector voltages are $\mathrm{V}_{\mathrm{C}}=3 \mathrm{~V}$ ... Take $\mathrm{V}_{\mathrm{BE}}=0.7 \mathrm{~V}$, transistor $\beta$ to be high and base currents to be negligible.
In the cascade amplifier circuit shown in the figure is determine the values of $R_{1}, R_{2}$ and $R_{L}$ such that the quiescent current through the transistors is $1 \...
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GATE ECE 1997 | Question 14
A sequence generator is shown in the figure is The counter status $\left(\mathrm{Q}_{0^{\prime}}, \mathrm{Q}_{1}, \mathrm{Q}_{2}\right)$ is initialised to $010$ ... rising clock edge. Give the sequence generate at $\mathrm{Q}_{0}$ till it repeats. What is the repetition rate of the generated sequence?
A sequence generator is shown in the figure is The counter status $\left(\mathrm{Q}_{0^{\prime}}, \mathrm{Q}_{1}, \mathrm{Q}_{2}\right)$ is initialised to $010$ using pre...
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GATE ECE 1997 | Question 15
Given an $\text{NMOS}$ circuit as shown in the figure is The specifications of the circuit are $\mathrm{V}_{\mathrm{DD}}=10 \mathrm{~V} ; \beta=\mathrm{K}=\mu_{n} \mathrm{C}_{o x}(\mathrm{~W} / \mathrm{L})=10^{-4} \mathrm{Amp} / \mathrm{V}^{2}$ ... $V_{D S}$ and $R_{D}$ for the circuit. Neglect body-effect for $\mathrm{V}_{\mathrm{T}}$.
Given an $\text{NMOS}$ circuit as shown in the figure isThe specifications of the circuit are$\mathrm{V}_{\mathrm{DD}}=10 \mathrm{~V} ; \beta=\mathrm{K}=\mu_{n} \mathrm{C...
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GATE ECE 1997 | Question 16
Find Static Noise-Margins for a $\text{BJT}$ inverter shown in the figure is Transistor used is an $n-p-n$ type with specifications as follows $\qquad \beta_{F}=70$ $ \qquad \mathrm{V}_{\mathrm{BEON}}=0.7 \mathrm{~V}$ ... $\qquad\mathrm{R}_{\mathrm{B}}=10 \; k \Omega$ and supply $ \mathrm{V}_{\mathrm{CC}}=5 \mathrm{~V}$.
Find Static Noise-Margins for a $\text{BJT}$ inverter shown in the figure is Transistor used is an $n-p-n$ type with specifications as follows$\qquad \beta_{F}=70$$ \qqua...
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GATE ECE 1997 | Question 17
For a typical $n-p-n$ transistor, as shown in the figure we have the following data available $\mathrm{W}_{\mathrm{C}}=20 \mu \mathrm{m}$ and Collcetor doping $=5 \times 10^{18} / \mathrm{cc}$ $\mathrm{W}_{\mathrm{E}}=1 \mu \mathrm{m}$ ...
For a typical $n-p-n$ transistor, as shown in the figure we have the following data available$\mathrm{W}_{\mathrm{C}}=20 \mu \mathrm{m}$ and Collcetor doping $=5 \times 1...
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GATE ECE 1997 | Question 18
An $n$-type silicon bar is doped uniformly by phosphorous atoms to a concentration $4.5 \times 10^{13} / \mathrm{cc}$. The bar has cross-section of $1 \mathrm{~mm}^{2}$ and length of $10 \mathrm{~cm}$. It is illuminated uniformly for region $x<0$ as shown in the figure ... $\qquad q=1.6 \times 10^{-19}$ coloumbs; $(k t / q)=26 \; \mathrm{mV}$.
An $n$-type silicon bar is doped uniformly by phosphorous atoms to a concentration $4.5 \times 10^{13} / \mathrm{cc}$. The bar has cross-section of $1 \mathrm{~mm}^{2}$ a...
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GATE ECE 1997 | Question 19
An $\text{IC}$ $555$ ... for the configuration chosen. If necessary you can suggest modification in the external circuit configuration.
An $\text{IC}$ $555$ chip has been used to construct a pulse-Generator. Typical pin connections with components is shown below in the figure is for such an application. H...
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GATE ECE 1997 | Question 20
An $8085 \; \mu \mathrm{P}$ uses a $2 \; \mathrm{MHz}$ ... used above take $(3 n+1)$ clock cycles, where $n$ is the number of accesses to the memory, inclusive of the opcode fetch.
An $8085 \; \mu \mathrm{P}$ uses a $2 \; \mathrm{MHz}$ crystal. Find the time taken by it to execute the following delay subroutine, inclusive of the call instruction in ...
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GATE ECE 1997 | Question 21
In the figure is a linear time invariant discrete systme is shown. Blocks labelled $D$ represent unit delay elements. For $n<0$, you may assume that $x$ (n), $y_{1}(n), y_{2}(n)$ are all zero. Find the expression for $y_{1}(n)$ and $y_{2}(n)$ ... $y_{2}(n)$
In the figure is a linear time invariant discrete systme is shown. Blocks labelled $D$ represent unit delay elements. For $n<0$, you may assume that $x$ (n), $y_{1}(n), y...
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GATE ECE 1997 | Question 22
In the circuit of figure when $R=0 \; \Omega$, the current $i_{k}$ equals $10 \mathrm{~A}$ Find the value of $R$ for which it absorbs maximum power Find the value of $\varepsilon$ Find $V_{2}$ when $R=\infty$ (open circuit)
In the circuit of figure when $R=0 \; \Omega$, the current $i_{k}$ equals $10 \mathrm{~A}$Find the value of $R$ for which it absorbs maximum powerFind the value of $\vare...
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GATE ECE 1997 | Question 23
In the circuit of the figure is all currents and voltages are sinusoids of frequency $\omega \; \mathrm{rad} / \mathrm{sec}$. Find the impedance to the right of $(\mathrm{A}, \mathrm{B})$ at $(\omega) =0 \; \mathrm{rad} / \mathrm{sec}$ ... where $I$ is positive $\omega_{0} \neq 0, \omega_{0} \neq \infty$ then find $I$, $\omega_{0}$ and $i_{2}(t)$
In the circuit of the figure is all currents and voltages are sinusoids of frequency $\omega \; \mathrm{rad} / \mathrm{sec}$.Find the impedance to the right of $(\mathrm...
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GATE ECE 1997 | Question 24
For the circuit shown in the figure is choose state variables $\mathrm{X}_{1}, \mathrm{X}_{2}, \mathrm{X}_{3^{\prime}}$, to be $i_{\mathrm{L} 1}(t), \mathrm{V}_{c2}(t), i_{\mathrm{L} 3}(t)$ Write the state equations \[ \left[\begin{array}{l ... $1 \mathrm{~A}$, then what would the total energy dissipated in the resistors in the interval $(0, \infty)$ be ?
For the circuit shown in the figure is choose state variables $\mathrm{X}_{1}, \mathrm{X}_{2}, \mathrm{X}_{3^{\prime}}$, to be $i_{\mathrm{L} 1}(t), \mathrm{V}_{c2}(t), i...
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GATE ECE 1997 | Question 25
A block diagram of a system is shown in the figure is draw the spectrum of the output signal with relative aptitudes of the frequencies.
A block diagram of a system is shown in the figure is draw the spectrum of the output signal with relative aptitudes of the frequencies.
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GATE ECE 1997 | Question 26
Find the mean of a function $X(T)=\sin ^{2}(\alpha T)$, where $\alpha$ is a constant, and $T$ is a random variable. The $p d f$ of $\mathrm{T}$ is given by, \[ \begin{aligned} f(T) &=e^{-T} \text { for } T \geq 0 \\ &=0 \text { for } T<0 \end{aligned} \]
Find the mean of a function $X(T)=\sin ^{2}(\alpha T)$, where $\alpha$ is a constant, and $T$ is a random variable. The $p d f$ of $\mathrm{T}$ is given by,\[\begin{align...
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GATE ECE 1997 | Question 27
The figure is shows the block diagram of phase-locked-loop $\text{(PLL)}$ in the locked condition. The output voltage of the phase detector is given by \[ \mathrm{V}_{p}=\mathrm{K}_{d}\left(\phi_{i}-\phi_{0}\right), \] where $\phi_{1}=$ phase of the input signal ... $(t)=u(t)$ radian, where $u(t)$ is the unit step function. Determine $\Phi_{0}(t)$ for $t>0$.
The figure is shows the block diagram of phase-locked-loop $\text{(PLL)}$ in the locked condition.The output voltage of the phase detector is given by\[\mathrm{V}_{p}=\ma...
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GATE ECE 1997 | Question 28
The figure is shows the first stage of a superheterodyne receiver. The desired input signal is at a frequency of $700 \; \mathrm{MHz}$. The local oscillator $\text{(L.O)}$ frequency is $1 \; \mathrm{GHz}$. The mixer is an ideal multiplier with a ... undesired signal should be $20 \mathrm{~dB}$ below the desired signal. Calculate the $Q$ required for the $\text{(BPF)}$.
The figure is shows the first stage of a superheterodyne receiver. The desired input signal is at a frequency of $700 \; \mathrm{MHz}$. The local oscillator $\text{(L.O)}...
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GATE ECE 1997 | Question 29
A uniform plane wave is normally incident from air on an infinitely thick magnetic material with relative permeability $100$ and relative permittivity $4$ see the figure is. The wave has an electric field of $1 \mathrm{V}$, meter $\text{(rms)}$. Find the average pointing vector inside the material.
A uniform plane wave is normally incident from air on an infinitely thick magnetic material with relative permeability $100$ and relative permittivity $4$ see the figure ...
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GATE ECE 1997 | Question 30
A dipole antenna has a $\sin \theta$ radiation pattern where the angle $\theta$ ... in the radiation pattern at an angle of $45^{\circ}$ from the ground plane? Find the direction of maximum radiation also.
A dipole antenna has a $\sin \theta$ radiation pattern where the angle $\theta$ is measured from the axis of the dipole. The dipole is vertically located above an ideal g...
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