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241

GATE ECE 1997 | Question 2.5
Each cell of a Static Random Access Memory contains $6 \; \text{MOS}$ transistors $4 \; \mathrm{MOS}$ transistors and $2$ capacitors $2 \; \text{MOS}$ transistors and $4$ capacitors $1 \; \text{MOS}$ transistor and $1$ capacitor

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242

GATE ECE 1997 | Question 2.6
A $2$ bit binary multiplier can be implemented using $2$ inputs $\text{ANDs}$ only $2$ input $\text{XOR s}$ and $4$ input $\text{AND}$ gates only Two $2$ inputs $\text{NORs}$ and one $\text{XNOR}$ gate $\text{XOR}$ gates and shift registers

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243

GATE ECE 1997 | Question 2.7
In standard $\text{TTL}$, the 'totem pole' stage refers to the multi-emitter input stage the phase splitter the output buffer open collector output stage

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244

GATE ECE 1997 | Question 2.8
The inverter $74 \; \mathrm{ALSO} 4$ has the following specifications \[ \begin{array}{l} \mathrm{I}_{\text {OH } \max }=-0.4 \mathrm{~mA}, \mathrm{l}_{\text {OLmax }}=8 \mathrm{~mA}, \mathrm{l}_{i H_{\max }}=20 \mathrm{~mA} \text {, } \\ \mathrm{l}_{\text {iLmax }}=-0.1 \mathrm{~mA} \text {, } \end{array} \] The fan-out based on the above will be $10$ $20$ $60$ $100$

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245

GATE ECE 1997 | Question 2.9
The output of the logic gate in the figure is $0$ $1$ $\text{A}$ $\mathrm{F}$

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246

GATE ECE 1997 | Question 2.10
In an $8085 \; \mu \; \mathrm{P}$ system, the $\text{RST}$ instruction will cause an interrupt only if an interrupt service routine is not being executed only if a bit in the interrupt mask is made $0$ only if interrupts have been enabled by an $\text{El}$ instruction None of the above

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247

GATE ECE 1997 | Question 3.1
In the circuit of the figure is the energy absorbed by the $4 \; \Omega$ resistor in the time interval $(0, \infty)$ is $36$ Joules $16$ Joules $256$ Joules None of the above

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248

GATE ECE 1997 | Question 3.2
In the circuit of the figure is the equivalent impedance seen across terminals $\text{a, b}$ is $\left(\frac{16}{3}\right) \Omega$ $\left(\frac{8}{3}\right) \Omega$ $\left(\frac{8}{3}+12 j\right) \Omega$ None of the above

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249

GATE ECE 1997 | Question 3.3
In the circuit of in the figure is the current $i_{D}$ through the ideal diode (zero cut in voltage and forward resistance) equals $0 \mathrm{~A}$ $4 \mathrm{~A}$ $1 \mathrm{~A}$ None of the above

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250

GATE ECE 1997 | Question 3.4
In the signal flow graph of the figure is $\text{y/ x}$ equals $3$ $\frac{5}{2}$ $2$ None of the above

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251

GATE ECE 1997 | Question 3.5
A certain linear time invariant system has the state and the output equations given below \[ \begin{array}{c} {\left[\begin{array}{l} \dot{\mathrm{X}}_{1} \\ \dot{\mathrm{X}}_{2} \end{array}\right]=\left[\begin{array}{rr} 1 & -1 \\ 0 & 1 \end{array}\right]\left[\ ... $\left.\frac{d y}{d t}\right|_{t=0}$ is $1$ $-1$ $0$ None of the above

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252

GATE ECE 1997 | Question 3.6
A communication channel has first-order low pass transfer function. The channel is used to transmit pulses at a symbol rate greater than the half-power frequency of the low pass function. Which of the network shown in the figure is can be used to equalise the received pulses?

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253

GATE ECE 1997 | Question 3.7
The power spectral density of a deterministic signal is given by $\left[\sin (f) / f^{2}\right]$ where $f$ is frequency. The autocorrelation function of this signal in the time domain is a rectangular pulse a delta function a sine pulse a triangular pulse

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254

GATE ECE 1997 | Question 3.8
An amplifier A has $6 \; d \mathrm{B}$ gain and $50 \; \Omega$ input and output impedances. The noise figure of this amplifier as shown in the figure is $(a)$ is $3 \; d \mathrm{B}$. A cascade of two such amplifiers as in the figure is will have a noise figure of $6 \; d \mathrm{B}$ $8 \; d \mathrm{B}$ $12 \;d \mathrm{B}$ None of the above

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255

GATE ECE 1997 | Question 3.9
A parabolic dish antenna has a conical beam $2^{\circ}$ wide, the directivity of the antenna is approximately $20 \; d \mathrm{B}$ $30 \; d \mathrm{B}$ $40 \; d \mathrm{B}$ $50 \; d \mathrm{B}$

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256

GATE ECE 1997 | Question 3.10
A very lossy, $\lambda / 4$ long, $50 \; \Omega$ transmission line is open circuited at the load end. The input impedance measured at the other end of the line is approximately $0$ $50 \; \Omega$ $\infty$ None of the above

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257

GATE ECE 1997 | Question 3.11
The skin depth at $10\; \mathrm{MHz}$ for a conductor is $1 \; \mathrm{cm}$. The phase velocity of an electromagnetic wave in the conductor at $1,000 \; \mathrm{MHz}$ is about $6 \times 10^{6} \mathrm{~m} / \mathrm{sec}$ $6 \times 10^{7} \mathrm{~m} / \mathrm{sec}$ $3 \times 10^{8} \mathrm{~m} / \mathrm{sec}$ $6 \times 10^{8} \mathrm{~m} / \mathrm{sec}$

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258

GATE ECE 1997 | Question 4.1
The output voltage $V_{0}$ of the circuit shown in the figure is $-4 \mathrm{~V}$ $6 \mathrm{~V}$ $5 \mathrm{~V}$ $-5.5 \mathrm{~V}$

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259

GATE ECE 1997 | Question 4.2
The decoding circuit shown in the figure is has been used to generate the active low chip select signal for a microprocessor peripheral. (The address lines are designated as $\mathrm{AO}$ to $\mathrm{A} 7$ for $\mathrm{l} / \mathrm{O}$ ... $30 \; \mathrm{H}$ to $33 \; \mathrm{H}$ $70 \; \mathrm{H}$ to $73 \; \mathrm{H}$

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260

GATE ECE 1997 | Question 4.3
The following insturctions have been executed by an $8085 \; \mu \mathrm{P}$ ... $6019$ $6379$ $6979$ None of the above

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261

GATE ECE 1997 | Question 4.4
A signed integer has been stored in a byte using the $2$'s complement format. We wish to store the same integer in a $16$ bit word. We should copy the original byte to the less significant byte of the word and fill the more significant ... bit of the original byte copy the original byte to the less significant byte as well as the more significant byte of the word

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262

GATE ECE 1997 | Question 4.5
A half wave rectifier uses a diode with a forward resistance $\text{Rf}$. The voltage is $\text{V}_\text{m} \sin \omega t$ and the load resistance is $\text{R}_\text{L}$. The $\text{DC}$ ... $\frac{2 \mathrm{Vm}}{\sqrt{\pi}}$ $\frac{\mathrm{V}_{m}}{\mathrm{R}_{\mathrm{L}}}$

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263

GATE ECE 1997 | Question 4.6
The intrinsic carrier density at $300 \mathrm{~K}$ is $1.5 \times 10^{10}$ / $\mathrm{cm}^{3}$, in silicon. For $n$-type silicon doped to $2.25 \times$ $10^{15}$ atoms $/ \mathrm{cm}^{3}$ ... $n=1.5 \times 10^{10} / \mathrm{cm}^{3}, p=1.5 \times 10^{10} / \mathrm{cm}^{3}$

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264

GATE ECE 1997 | Question 4.7
For the $\text{NMOS}$ logic gate shown in the figure is the logic function implemented is $\overline{\mathrm{ABCDE}}$ $(\mathrm{AB}+\overline{\mathrm{C}}) \cdot(\overline{\mathrm{D}+\mathrm{E}})$ ... $(\overline{\mathrm{A}+\mathrm{B}}) \cdot \mathrm{C}+\overline{\mathrm{D}} \cdot \overline{\mathrm{E}}$

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265

GATE ECE 1997 | Question 4.8
In a $\text{J-K}$ flip-flip we have $\text{J=Q}$ and $\text{K}=1$. Assuming the flip flop was initially cleared and then clocked for $6$ puleses, the sequence at the $\text{Q}$ output will be $010000$ $011001$ $010010$ $010101$

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266

GATE ECE 1997 | Question 4.9
The gate delay of an $\text{NMOS}$ inverter is dominated by charge time rather than discharge time because the driver transistor has larger threshold voltage than the load transistor the driver transistor has larger leakage currents compared to the load transistor the load transistor has a smaller $\text{W/L}$ ratio compared to the driver transistor none of the above

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267

GATE ECE 1997 | Question 4.10
The boolean function $\mathrm{A}+\mathrm{BC}$ is a reduced form of $\mathrm{AB}+\mathrm{BC}$ $(\mathrm{A}+\mathrm{B}) \cdot(\mathrm{A}+\mathrm{C})$ $\overline{\mathrm{A}} \mathrm{B}+\mathrm{A} \overline{\mathrm{B}} \mathrm{C}$ $(\mathrm{A}+\mathrm{C}) \cdot \mathrm{B}$

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268

GATE ECE 1997 | Question 5.1
In the case of a linear time invariant system (1) Poles in the right half plane implies Exponential decay of output (2) Impulse response zero for $t \leq 0$ implies System is casual No stored energy in the system System is unstable.

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269

GATE ECE 1997 | Question 5.2
If the Fourier Transform of deterministic signal $\mathrm{g}(\mathrm{t})$ is $\mathrm{G}(f)$, then (1) The Fourier Transform of $g(t-2)$ is $G(f) e^{-j(4 \pi f)}$ (2) The Fourier Transform of $g(t / 2)$ is $G(2 f)$ $2 G(2 f)$ $G(f-2)$

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270

GATE ECE 1997 | Question 5.3
(1) An $8$-bit wide $5$ word sequential memory will have $8$ Fixed $\text{‘AND'}$ gates and $4$ programmable $\text{‘OR'}$ gates (2) A $256 \times 4$ $\text{EFROM}$ has Eight $4$ bit shift registers $4$ words of $32$ bits each $8$ address pins and $4$ data pins output

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271

GATE ECE 1997 | Question 5.4
(1) Wave tilt Under-water propagation (2) Faraday Rotation Ground wave propagation Space wave propagation Ionospheric propagation

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272

GATE ECE 1997 | Question 5.5
While moving data between registers of the $8085$ and the stack (1) a $\text{PUSH}$ instruction Pre increments the stack pointer (2) a $\text{POP}$ instruction Post increments the stack pointer Pre decrements the stack pointer Post decrements the stack pointer

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273

GATE ECE 1997 | Question 5.6
Negative feedback in (1) Voltage series configuration increase input impedance (2) Current shunt configuration decrease input impedance increases closed loop gain leads to oscillation

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274

GATE ECE 1997 | Question 6
The figure is shows the block diagram representation of control system. The system in block A has an impulse response $h_{A}(t)=e^{-t} u (t)$. The system in block $B$ has an impulse response $h_{\mathrm{B}}(t)=e^{{-2 f}} u(t)$ ... for which the system becomes unstable Note: \[ \begin{aligned} u (t) &=01 \leq 9 \\ &=1 t>0 \end{aligned} \]

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275

GATE ECE 1997 | Question 7
Circuit shown in the figure is an $\text{NMOS}$ shift register. All transistors are $\text{NMOS}$ enhancement type with threshold voltage $V_{T}=1 \mathrm{~V}$. Supply used is $\mathrm{V}_{\mathrm{DD}}=5 \mathrm{~V}$ ... on capacitor $C_{2}$ after $\phi_{2}$ goes low. Neglect body-effect on $\mathrm{V}_{\mathrm{T}}$ in your evaluation.

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276

GATE ECE 1997 | Question 8
The transistor in the circuit shown in the figure is so biased ($dc$ biasing network is not shown) that the $dc$ collecter current $I_{c}=1 \mathrm{~mA}$. Supply is $V_{cc}=5 \mathrm{~V}$. The network components have following values \[\begin{array}{l ... capacitor across $R_{E}$ is $25 \mu \mathrm{F}$. The bypass capacitor $C_{E}$ is removed leaving $R_{E}$ unbypassed

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277

GATE ECE 1997 | Question 9
$\mathrm{A} \frac{\lambda}{2}$ section of a $600 \; \Omega$ transmission line, short circuited at one end and open circuited at the other end, is shown in the figure is $100 \mathrm{~V} / 75 \; \Omega$ generator is connected at the mid point of the section as shown in the figure. Find voltage at the open circuited end of the line.

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278

GATE ECE 1997 | Question 10
In the ciruit of the figure is $\mathrm{R}=100 \; \Omega, \mathrm{L}=20 \; n \mathrm{H}$ and $\mathrm{C}=32 \; \mathrm{pF}$. The circuit is maintained at a temperature of $300 \; \text{K.}$ Derive and plot the power spectral density of the ... the relevant points on the plot with numerical values. (The Boltzmann constant \[ k=1.28 \times 10-23 \mathrm{~J} / \mathrm{K} \]

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279

GATE ECE 1997 | Question 11
Consider the circuit given in the figure is using an ideal operational amplifier. The characteristics of the diode are given by the relation $\mathrm{I}=\mathrm{I}_{\mathrm{S}}\left(\frac{\mathrm{V}}{e^{\mathrm{kT}}}-1\right)$ where $V$ is the forward voltage across the ... $\frac{k \mathrm{T}}{q}=25 \mathrm{~mV}$, find the input voltage $V_{i}$, for which $V_{0}=0$.

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280

GATE ECE 1997 | Question 12
In the circuit shown in the figure is assume that the operational amplifier is ideal and that $\mathrm{V}_{\mathrm{o}}=0 \mathrm{~V}$ initially. The switch is connected first to ' $A$ ' charging $C_{1}$ to the voltage $V$. It is then connected to the point ... $\mathrm{V}=10 \; \mathrm{mV}$, what is the average rate of change of the output voltage?

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