Recent questions tagged semiconductor / GO Electronics

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GATE ECE 2024 | Question: 12
For non-degenerately doped n-type silicon, which one of the following plots represents the temperature $(T)$ dependence of free electron concentration $(n)$ ?

For non-degenerately doped n-type silicon, which one of the following plots represents the temperature $(T)$ dependence of free electron concentration $(n)$ ?...

admin

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admin asked Feb 16

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GATE ECE 2024 | Question: 16
The free electron concentration profile $n(x)$ in a doped semiconductor at equilibrium is shown in the figure, where the points $\mathrm{A}, \mathrm{B}$, and $\mathrm{C}$ mark three different positions. Which of the following statements is/are true? For $x$ ... $\mathrm{B}$ and $\mathrm{A}$, the electric field is directed from $\mathrm{A}$ to $\mathrm{B}$.

The free electron concentration profile $n(x)$ in a doped semiconductor at equilibrium is shown in the figure, where the points $\mathrm{A}, \mathrm{B}$, and $\m...

admin

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admin asked Feb 16

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GATE ECE 2024 | Question: 17
A machine has a $32$-bit architecture with $1$-word long instructions. It has $24$ registers and supports an instruction set of size $40$. Each instruction has five distinct fields, namely opcode, two source register identifiers, one destination register ... value. Assuming that the immediate operand is an unsigned integer, its maximum value is $\_\_\_\_\_\_$.

A machine has a $32$-bit architecture with $1$-word long instructions. It has $24$ registers and supports an instruction set of size $40$. Each instruction has five disti...

admin

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admin asked Feb 16

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GATE ECE 2020 | Question: 6
A single crystal intrinsic semiconductor is at a temperature of $300$ $\text{K}$ with effective density of states for holes twice that of electrons. The thermal voltage is $26$ mV. The intrinsic Fermi level is shifted from mid-bandgap energy level by $18.02 \: meV$ $9.01 \: meV$ $13.45 \: meV$ $26.90 \: meV$

A single crystal intrinsic semiconductor is at a temperature of $300$ $\text{K}$ with effective density of states for holes twice that of electrons. The thermal voltage i...

go_editor

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go_editor asked Feb 13, 2020

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GATE ECE 2020 | Question: 32
The band diagram of a $p$-type semiconductor with a band-gap of $1$ eV is shown. Using this semiconductor, a $\text{MOS}$ capacitor having $V_{TH}$ of $-0.16 V$, ${C}'_{ox}$ of $100\:nF/cm^{2}$ and a metal work function of $3.87 \: eV$ is fabricated. There is no ... $1.70\times 10^{-8}$ $0.52\times 10^{-8}$ $1.41\times 10^{-8}$ $0.93\times 10^{-8}$

The band diagram of a $p$-type semiconductor with a band-gap of $1$ eV is shown. Using this semiconductor, a $\text{MOS}$ capacitor having $V_{TH}$ of $-0.16 V$, ${C}'_{o...

go_editor

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go_editor asked Feb 13, 2020

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GATE ECE 2016 Set 3 | Question: 10
The $I-V$ characteristics of three types of diodes at the room temperature, made of semiconductors $X, Y$ and $Z$, are shown in the figure. Assume that the diodes are uniformly doped and identical in all respects except their materials. If $E_{gX}$,$E_{gY}$ ... $E_{gX}=E_{gY}=E_{gZ}$ $E_{gX}<E_{gY}<E_{gZ}$ no relationship among these band gaps exists.

The $I-V$ characteristics of three types of diodes at the room temperature, made of semiconductors $X, Y$ and $Z$, are shown in the figure. Assume that the diodes are uni...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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GATE ECE 2016 Set 1 | Question: 11
A small percentage of impurity is added to an intrinsic semiconductor at $300 \: K$. Which one of the following statements is true for the energy band diagram shown in the following figure? Intrinsic semiconductor doped with pentavalent ... atoms to form $p$-type semiconductor. Intrinsic semiconductor doped with trivalent atoms to form $p$-type semiconductor.

A small percentage of impurity is added to an intrinsic semiconductor at $300 \: K$. Which one of the following statements is true for the energy band diagram shown in th...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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GATE ECE 2016 Set 1 | Question: 12
Consider the following statements for a metal oxide semiconductor field effect transistor (MOSFET): As channel length reduces,OFF-state current increases. As channel length reduces,output resistance increases. As channel length reduces,threshold voltage remains constant. As channel ... . Which of the above statements are INCORRECT? P and Q P and S Q and R R and S

Consider the following statements for a metal oxide semiconductor field effect transistor (MOSFET):As channel length reduces,OFF-state current increases.As channel length...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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GATE ECE 2016 Set 1 | Question: 38
The figure below shows the doping distribution in a $p$-type semiconductor in log scale. The magnitude of the electric field (in $kV/cm$) in the semiconductor due to non uniform doping is _________

The figure below shows the doping distribution in a $p$-type semiconductor in log scale.The magnitude of the electric field (in $kV/cm$) in the semiconductor due to non u...

Milicevic3306

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Milicevic3306 asked Mar 27, 2018

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10

GATE ECE 2014 Set 4 | Question: 36
An N-type semiconductor having uniform doping is biased as shown in the figure. If $E_C$ is the lowest energy level of the conduction band, $E_V$ is the highest energy level of the valance band and $E_F$ is the Fermi level, which one of the following represents the energy band diagram for the biased N-type semiconductor?

An N-type semiconductor having uniform doping is biased as shown in the figure.If $E_C$ is the lowest energy level of the conduction band, $E_V$ is the highest energy lev...

Milicevic3306

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Milicevic3306 asked Mar 26, 2018

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GATE ECE 2013 | Question: 45
There are four chips each of $1024\:\text{bytes}$ connected to a $16\:\text{bit}$ address bus as shown in the figure below. $RAMs\: 1, 2, 3$ and $4$ ... $0500H-08FFH, 1500H-18FFH, 3500H-38FFH, 5500H-58FFH$ $0800H-0BFFH, 1800H-1BFFH, 2800H-2BFFH, 3800H-3BFFH$

There are four chips each of $1024\:\text{bytes}$ connected to a $16\:\text{bit}$ address bus as shown in the figure below. $RAMs\: 1, 2, 3$ and $4$ respectively are mapp...

Milicevic3306

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Milicevic3306 asked Mar 25, 2018

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GATE ECE 2017 Set 2 | Question: 17
In a DRAM, periodic refreshing is not required information is stored in a capacitor information is stored in a latch both read and write operations can be performed simultaneously

In a DRAM, periodic refreshing is not required information is stored in a capacitor information is stored in a latchboth read and write operations can be performed simult...

admin

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admin asked Nov 23, 2017