For the logic circuit shown in the figure is the output $Y$ is equal to

- $\overline{\mathrm{ABC}}$
- $\overline{\mathrm{A}}+\overline{\mathrm{B}}+\overline{\mathrm{C}}$
- $\overline{\mathrm{AB}}+\overline{\mathrm{BC}}+\overline{\mathrm{A}}+\overline{\mathrm{C}}$