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GATE ECE 2008 | Question-58

For the circuit shown in the following figure, $\mathrm{I}_{0}-\mathrm{I}_{3}$ are inputs to the $4: 1$ multiplexer. $\mathrm{R}$ (MSB) and $\mathrm{S}$ are control bits.


The output $Z$ can be represented by

  1. $P Q+P \bar{Q} S+\bar{Q} \bar{R} \bar{S}$
  2. $P \bar{Q}+P Q \bar{R}+\bar{P} \bar{Q} \bar{S}$
  3. $P \bar{Q} \bar{R}+\bar{P} QR+P Q RS+\bar{Q} \bar{R} \bar{S}$
  4. $P Q \bar{R}+P Q R \bar{S}+P \bar{Q} \bar{R} S+\bar{Q} \bar{R} \bar{S}$
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