edited by
1,124 views
2 2 votes

An $8$- to $1$ multiplexer is used to implement a logical function $Y$ as shown in the figure. The output $Y$ is given by

  1. $Y = A \: \overline{B} \:C+A \: \overline{C}  \:D$
  2. $Y  = \overline{A} \: B \:C +A \: \overline{B} \: D$
  3. $Y = A \: B \: \overline{C} + \overline{A}  \: C \:D$
  4. $Y= \overline{A} \: \overline{B} \: D + A  \: \overline{B}  \: C$

1 Answer

Answer:
Position:
Show:

Related questions

2 2 votes
1 1 answer
1.2k
1.2k views
Milicevic3306 asked Mar 26, 2018
1,236 views
Consider the multiplexer based logic circuit shown in the figure.Which one of the following Boolean functions is realized by the circuit?$F= W \overline{S_1} \: \overline...
1 1 vote
1 1 answer
906
906 views
Milicevic3306 asked Mar 26, 2018
906 views
In the circuit shown, $W$ and $Y$ are MSBs of the control inputs. The output $F$ is given by$F= W\overline{X}+\overline{W}X+\overline{Y}\overline{Z}$$F= W\overline{X}+\ov...
1 1 vote
0 0 answers
616
616 views
Milicevic3306 asked Mar 26, 2018
616 views
If $X$ and $Y$ are inputs and the Difference $(D=X-Y)$ and the Borrow $(B)$ are the outputs, which one of the following diagrams implements a half-subtractor?
0 0 votes
0 0 answers
695
695 views
Milicevic3306 asked Mar 27, 2018
695 views
A $4:1$ multiplexer is to be used for generating the output carry of a full adder. $A$ and $B$ are the bits to be added while $C_{in}$ is the input carry and $C_{out}$ is...

Add Synced Question

×