• edited by
759 views
2 2 votes

The output $F$ in the digital logic circuit shown in the figure is

  1. $F = \overline{X}\:Y\:Z + X\:\overline{Y}\:Z$
  2. $F = \overline{X}\:Y\:\overline{Z} + X\:\overline{Y}\:\overline{Z}$
  3. $F = \overline{X}\:\overline{Y}\:Z + X\:Y\:Z$
  4. $F = \overline{X}\:\overline{Y}\:\overline{Z} + X\:Y\:Z$

Please log in or register to answer this question.

Answer:
Position:
Show:

Related questions

3 3 votes
2 2 answers
551
551 views
gatecse asked Feb 23
551 views
In the circuit shown in the Figure, $A$ and $B$ are logic inputs and $Y$ is the logic output.Which of the following logic operations is realized by the circuit?NORORXORAN...
1 1 vote
1 1 answer
352
352 views
gatecse asked Feb 23
352 views
A Boolean function, $f(x, y, z)$ with $x$ as MSB and $z$ as LSB is realized by $4: 1$ multiplexer (MUX) with select lines, $\mathrm{S}_{1}$ and $\mathrm{S}_{0}\left(\math...
1 1 vote
0 0 answers
473
473 views
admin asked Oct 2, 2022
473 views
For the $\text{NMOS}$ logic gate shown in the figure is the logic function implemented is$\overline{\mathrm{ABCDE}}$$(\mathrm{AB}+\overline{\mathrm{C}}) \cdot(\overline{\...
0 0 votes
0 0 answers
751
751 views
admin asked Sep 29, 2022
751 views
In the TTL circuit in the figure, $\mathrm{S}_{2}$ to $\mathrm{S}_{0}$ are select lines and $\text{X}_{7}$ to $\text{X}_{0}$ are input lines. $\text{S}_{0}$ and $\text{X}...

Add Synced Question

×