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GATE ECE 2023 | Question: 13
In the circuit shown below, $\mathrm{P}$ and $\mathrm{Q}$ are the inputs. The logical function realized by the circuit shown below is $\mathrm{Y}=\mathrm{PQ}$ $\mathrm{Y}=\mathrm{P}+\mathrm{Q}$ $\mathrm{Y}=\overline{\mathrm{PQ}}$ $\mathrm{Y}=\overline{\mathrm{P}+\mathrm{Q}}$
In the circuit shown below, $\mathrm{P}$ and $\mathrm{Q}$ are the inputs. The logical function realized by the circuit shown below is$\mathrm{Y}=\mathrm{PQ}$$\mathrm{Y}=\...
admin
46.4k
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1.7k
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admin
asked
May 20, 2023
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gateece-2023
multiplexers
digital-circuits
combinational-circuits
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0
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1
answer
2
GATE ECE 2023 | Question: 3
Let $w^4=16 j$. Which of the following cannot be a value of $w$ ? $2 e^{\frac{j 2 \pi}{8}}$ $2 e^{\frac{j \pi}{8}}$ $2 e^{\frac{j5 \pi}{8}}$ $2 e^{\frac{j9 \pi}{8}}$
Let $w^4=16 j$. Which of the following cannot be a value of $w$ ?$2 e^{\frac{j 2 \pi}{8}}$$2 e^{\frac{j \pi}{8}}$$2 e^{\frac{j5 \pi}{8}}$$2 e^{\frac{j9 \pi}{8}}$
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46.4k
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1.0k
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May 20, 2023
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gateece-2023
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3
GATE ECE 2023 | Question: 1
Let $v_1=\left[\begin{array}{l}1 \\ 2 \\ 0\end{array}\right]$ and $v_2=\left[\begin{array}{l}2 \\ 1 \\ 3\end{array}\right]$ be two vectors. The value of the coefficient $\alpha$ in the expression $v_1=\alpha v_2+e$, which minimizes the length of the error vector $e$, is $\frac{7}{2}$ $\frac{-2}{7}$ $\frac{2}{7}$ $\frac{-7}{2}$
Let $v_1=\left[\begin{array}{l}1 \\ 2 \\ 0\end{array}\right]$ and $v_2=\left[\begin{array}{l}2 \\ 1 \\ 3\end{array}\right]$ be two vectors. The value of the coefficient $...
admin
46.4k
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978
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admin
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May 20, 2023
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gateece-2023
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0
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1
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4
GATE ECE 2024 | Question: 13
In the circuit shown, the $n: 1$ step-down transformer and the diodes are ideal. The diodes have no voltage drop in forward biased condition. If the input voltage (in Volts) is $V_{s}(t)=10 \sin \omega t$ and the average value of load voltage $V_{L}(t)$ (in Volts) is $2.5 / \pi$, the value of $n$ is $\_\_\_\_\_\_\_$. $4$ $8$ $12$ $16$
In the circuit shown, the $n: 1$ step-down transformer and the diodes are ideal. The diodes have no voltage drop in forward biased condition. If the input voltage (in ...
admin
46.4k
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879
views
admin
asked
Feb 16
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gateece-2024
hilbert-transformer
diodes
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1
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1
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5
GATE ECE 2007 | Question: 44
The following binary values were applied to the $\mathrm{X}$ and $\mathrm{Y}$ inputs of the NAND latch shown in the figure in the sequence indicated below: \[ \mathrm{X}=0, \mathrm{Y}=1 ; \quad \mathrm{X}=0, \mathrm{Y}=0 ; \quad \mathrm{X}=1, \mathrm{Y}=1 \ ...
The following binary values were applied to the $\mathrm{X}$ and $\mathrm{Y}$ inputs of the NAND latch shown in the figure in the sequence indicated below:\[ \mathrm{X}=0...
admin
46.4k
points
847
views
admin
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Sep 19, 2022
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gate2007-ec
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GATE ECE 2024 | Question: 9
For the Boolean function \[ F(A, B, C, D)=\sum m(0,2,5,7,8,10,12,13,14,15) \text {, } \] the essential prime implicants are $\_\_\_\_\_\_$. $B D, \bar{B} \bar{D}$ $B D, A B$ $A B, \bar{B} \bar{D}$ $B D, \bar{B} \bar{D}, A B$
For the Boolean function\[F(A, B, C, D)=\sum m(0,2,5,7,8,10,12,13,14,15) \text {, }\]the essential prime implicants are $\_\_\_\_\_\_$.$B D, \bar{B} \bar{D}$$...
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46.4k
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800
views
admin
asked
Feb 16
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gateece-2024
boolean-algebra
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0
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7
GATE ECE 2024 | Question: 11
A causal and stable $\text{LTI}$ system with impulse response $h(t)$ produces an output $y(t)$ for an input signal $x(t)$. A signal $x(0.5 t)$ is applied to another causal and stable $\text{LTI}$ system with impulse response $h(0.5 t)$. The resulting output is $\_\_\_\_\_\_\_$. $2 y(0.5 t)$ $4 y(0.5 t)$ $0.25 y(2 t)$ $0.25 y(0.25 t)$
A causal and stable $\text{LTI}$ system with impulse response $h(t)$ produces an output $y(t)$ for an input signal $x(t)$. A signal $x(0.5 t)$ is applied to a...
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46.4k
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735
views
admin
asked
Feb 16
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gateece-2024
linear-time-invariant-systems
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GATE ECE 2023 | Question: 10
Consider a narrow band signal, propagating in a lossless dielectric medium $\left(\varepsilon_{r}=4, \mu_{r}=1\right)$, with phase velocity $v_{p}$ and group velocity $v_{g}$. Which of the following statement is true? ($c$ ... $v_{p} > c, v_{g} < c$ $v_{p} < c, v_{g} < c$
Consider a narrow band signal, propagating in a lossless dielectric medium $\left(\varepsilon_{r}=4, \mu_{r}=1\right)$, with phase velocity $v_{p}$ and group velocity $v_...
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46.4k
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731
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May 20, 2023
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gateece-2023
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9
GATE ECE 2024 | Question: 12
For non-degenerately doped n-type silicon, which one of the following plots represents the temperature $(T)$ dependence of free electron concentration $(n)$ ?
For non-degenerately doped n-type silicon, which one of the following plots represents the temperature $(T)$ dependence of free electron concentration $(n)$ ?...
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46.4k
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689
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admin
asked
Feb 16
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gateece-2024
semiconductor
silicon
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0
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10
GATE ECE 2023 | Question: 12
A cascade of common-source amplifiers in a unity gain feedback configuration oscillates when the closed loop gain is less than $1$ and the phase shift is less than $180^{\circ}$. the closed loop gain is greater than $1$ ... $180^{\circ}$. the closed loop gain is greater than $1$ and the phase shift is greater than $180^{\circ}$.
A cascade of common-source amplifiers in a unity gain feedback configuration oscillates whenthe closed loop gain is less than $1$ and the phase shift is less than $180^{\...
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46.4k
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686
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admin
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May 20, 2023
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gateece-2023
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GATE ECE 2024 | Question: 15
Let $\rho(x, y, z, t)$ and $u(x, y, z, t)$ represent density and velocity, respectively, at a point $(x, y, z)$ and time $t$. Assume $\frac{\partial \rho}{\partial t}$ is continuous. Let $V$ be an arbitrary volume in space enclosed by the closed surface ... $\int_{V} \frac{\partial \rho}{\partial t} d v=\int_{V} \nabla \cdot(\rho u) d v$
Let $\rho(x, y, z, t)$ and $u(x, y, z, t)$ represent density and velocity, respectively, at a point $(x, y, z)$ and time $t$. Assume $\frac{\partial \rho}{...
admin
46.4k
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684
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Feb 16
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gateece-2024
continuity-and-differentiability
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GATE ECE 2024 | Question: 18
An amplitude modulator has output (in Volts) \[ s(t)=A \cos (400 \pi t)+B \cos (360 \pi t)+B \cos (440 \pi t) . \] The carrier power normalized to $1 \Omega$ resistance is $50$ Watts. The ratio of the total sideband power to the total power is $1 / 9$. The value of $\text{B}$ (in Volts, rounded off to two decimal places) is $\_\_\_\_\_\_\_$.
An amplitude modulator has output (in Volts)\[s(t)=A \cos (400 \pi t)+B \cos (360 \pi t)+B \cos (440 \pi t) .\]The carrier power normalized to $1 \Omega$ resistance is $5...
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46.4k
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681
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Feb 16
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gateece-2024
numerical-answers
amplitude-modulation
signals-and-systems
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1
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1
answer
13
GATE ECE 2009 | Question: 58
Consider the CMOS circuit shown, where the gate voltage $V_{G}$ of the $\text{n-MOSFET}$ is increased from zero, while the gate voltage of the $\text{p-MOSFET}$ is kept constant at $3 \mathrm{~V}$ ... $4-\frac{\sqrt{3}}{2} \mathrm{~V}$ $4+\frac{\sqrt{3}}{2} \mathrm{~V}$
Consider the CMOS circuit shown, where the gate voltage $V_{G}$ of the $\text{n-MOSFET}$ is increased from zero, while the gate voltage of the $\text{p-MOSFET}$ is kept c...
admin
46.4k
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679
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admin
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Sep 15, 2022
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gate2009-ec
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GATE ECE 2024 | Question: 21
In the given circuit, the current $I_{x}$ (in $m A$ ) is $\_\_\_\_\_\_\_\_$.
In the given circuit, the current $I_{x}$ (in $m A$ ) is $\_\_\_\_\_\_\_\_$.
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46.4k
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644
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Feb 16
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gateece-2024
numerical-answers
voltage-reference-circuits
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15
GATE ECE 2023 | Question: 6
In a semiconductor, if the Fermi energy level lies in the conduction band, then the semiconductor is known as degenerate $\text{n}$-type. degenerate $\text{p}$-type. non-degenerate $\text{n}$-type. non-degenerate $\text{p}$-type.
In a semiconductor, if the Fermi energy level lies in the conduction band, then the semiconductor is known asdegenerate $\text{n}$-type.degenerate $\text{p}$-type.non-deg...
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46.4k
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644
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admin
asked
May 20, 2023
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gateece-2023
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16
GATE ECE 2006 | Question: 45
For the circuit shown in figure below, two $4$ ... $\mathrm{S}=1, \mathrm{C}_{0}=0$ $\mathrm{S}=1, \mathrm{C}_{0}=1$
For the circuit shown in figure below, two $4$-bit parallel-in serial-out shift registers loaded with the data shown are used to feed the data to a full adder. Initially,...
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46.4k
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606
views
admin
asked
Sep 20, 2022
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gate2006-ec
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GATE ECE 2024 | Question: 28
A satellite attitude control system, as shown below, has a plant with transfer function $G(s)=\frac{1}{s^{2}}$ cascaded with a compensator $C(s)=\frac{K(s+\alpha)}{s+4}$, where $K$ and $\alpha$ are positive real constants. In order for the closed-loop system to have poles at $-1 \pm j \sqrt{3}$, the value of $\alpha$ must be $\_\_\_\_\_\_$. $0$ $1$ $2$ $3$
A satellite attitude control system, as shown below, has a plant with transfer function $G(s)=\frac{1}{s^{2}}$ cascaded with a compensator $C(s)=\frac{K(s+...
admin
46.4k
points
605
views
admin
asked
Feb 16
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gateece-2024
feedback-systems
transfer-function
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0
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18
GATE ECE 2024 | Question: 17
A machine has a $32$-bit architecture with $1$-word long instructions. It has $24$ registers and supports an instruction set of size $40$. Each instruction has five distinct fields, namely opcode, two source register identifiers, one destination register ... value. Assuming that the immediate operand is an unsigned integer, its maximum value is $\_\_\_\_\_\_$.
A machine has a $32$-bit architecture with $1$-word long instructions. It has $24$ registers and supports an instruction set of size $40$. Each instruction has five disti...
admin
46.4k
points
603
views
admin
asked
Feb 16
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gateece-2024
numerical-answers
semiconductor
machine-instruction
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GATE ECE 2021 | Question: 14
The complete Nyquist plot of the open-loop transfer function $G(s)H(s)$ of a feedback control system in the figure. If $G(s)H(s)$ has one zero in the right-half of the $s$-plane, the number of poles that the closed-loop system will have in the right-half of the $s$-plane is $0$ $1$ $4$ $3$
The complete Nyquist plot of the open-loop transfer function $G(s)H(s)$ of a feedback control system in the figure.If $G(s)H(s)$ has one zero in the right-half of the $s$...
Arjun
6.6k
points
601
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Arjun
asked
Feb 19, 2021
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gateec-2021
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GATE ECE 2022 | Question: 17
Select the Boolean function(s) equivalent to $x+yz,$ where $x, y,$ and $z$ are Boolean variables, and $+$ denotes logical $\text{OR}$ operation. $x + z + xy$ $(x + y)(x + z)$ $x + xy + yz$ $x + xz + xy$
Select the Boolean function(s) equivalent to $x+yz,$ where $x, y,$ and $z$ are Boolean variables, and $+$ denotes logical $\text{OR}$ operation.$x + z + xy$$(x + y)(x + z...
Arjun
6.6k
points
583
views
Arjun
asked
Feb 15, 2022
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gateece-2022
multiple-selects
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21
GATE ECE 2024 | Question: 27
Consider a unity negative feedback control system with forward path gain $G(s)=\frac{K}{(s+1)(s+2)(s+3)}$ as shown. The impulse response of the closed-loop system decays faster than $e^{-t}$ if $\_\_\_\_\_\_$. $1 \leq K \leq 5$ $7 \leq K \leq 21$ $-4 \leq K \leq-1$ $-24 \leq K \leq-6$
Consider a unity negative feedback control system with forward path gain $G(s)=\frac{K}{(s+1)(s+2)(s+3)}$ as shown.The impulse response of the closed-loop ...
admin
46.4k
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576
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admin
asked
Feb 16
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gateece-2024
feedback-systems
poles-and-zeros
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0
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0
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22
GATE ECE 2024 | Question: 10
A white Gaussian noise $w(t)$ with zero mean and power spectral density $\frac{N_{0}}{2}$, when applied to a first-order RC low pass filter produces an output $n(t)$. At a particular time $t=t_{k}$, the variance of the random variable $n\left(t_{k}\right)$ is $\_\_\_\_\_\_\_$. $\frac{N_{0}}{4 R C}$ $\frac{N_{0}}{2 R C}$ $\frac{N_{0}}{R C}$ $\frac{2 N_{0}}{R C}$
A white Gaussian noise $w(t)$ with zero mean and power spectral density $\frac{N_{0}}{2}$, when applied to a first-order RC low pass filter produces an output...
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46.4k
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562
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asked
Feb 16
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gateece-2024
gaussian-noise
first-order-differential-equation
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23
GATE ECE 2004 | Question: 56
In the modulo-$6$ ripple counter shown in the given figure, the output of the $2$-input gate is used to clear the J-K flip-flops. The $2$-input gate is a NAND gate a NOR gate an OR gate an AND gate
In the modulo-$6$ ripple counter shown in the given figure, the output of the $2$-input gate is used to clear the J-K flip-flops.The $2$-input gate isa NAND gatea NOR gat...
admin
46.4k
points
561
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admin
asked
Sep 25, 2022
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gate2004-ec
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GATE ECE 2023 | Question: 23
For the two port network shown below, the $[\mathrm{Y}] – $parameters is given as $[Y]=\frac{1}{100}\left[\begin{array}{cc}2 & -1 \\ -1 & 4 / 3\end{array}\right] S$ The value of load impedance $\mathrm{Z}_{\mathrm{L},}$ in $\Omega$, for maximum power transfer will be ____________ (rounded off to the nearest integer).
For the two port network shown below, the $[\mathrm{Y}] – $parameters is given as$$[Y]=\frac{1}{100}\left[\begin{array}{cc}2 & -1 \\ -1 & 4 / 3\end{array}\right] S$$The...
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46.4k
points
551
views
admin
asked
May 20, 2023
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gateece-2023
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GATE ECE 2024 | Question: 16
The free electron concentration profile $n(x)$ in a doped semiconductor at equilibrium is shown in the figure, where the points $\mathrm{A}, \mathrm{B}$, and $\mathrm{C}$ mark three different positions. Which of the following statements is/are true? For $x$ ... $\mathrm{B}$ and $\mathrm{A}$, the electric field is directed from $\mathrm{A}$ to $\mathrm{B}$.
The free electron concentration profile $n(x)$ in a doped semiconductor at equilibrium is shown in the figure, where the points $\mathrm{A}, \mathrm{B}$, and $\m...
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46.4k
points
548
views
admin
asked
Feb 16
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gateece-2024
semiconductor
diffusion
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1
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1
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26
GATE ECE 2022 | Question: 39
Consider a Boolean gate $\text{(D)}$ where the output $Y$ is related to the inputs $A$ and $B$ as, $Y = A + \overline{B},$ where $+$ denotes logical $\text{OR}$ operation. The Boolean inputs $'0'$ and $'1'$ are also ... $\text{OR}$ logic cannot be implemented $\text{NOR}$ logic can be implemented $\text{AND}$ logic cannot be implemented
Consider a Boolean gate $\text{(D)}$ where the output $Y$ is related to the inputs $A$ and $B$ as, $Y = A + \overline{B},$ where $+$ denotes logical $\text{OR}$ operation...
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6.6k
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538
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Arjun
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Feb 15, 2022
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multiple-selects
functional-completeness
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27
GATE ECE 2024 | Question: 19
In a number system of base $r$, the equation $x^{2}-12 x+37=0$ has $x=8$ as one of its solutions. The value of $r$ is $\_\_\_\_\_\_\_$.
In a number system of base $r$, the equation $x^{2}-12 x+37=0$ has $x=8$ as one of its solutions. The value of $r$ is $\_\_\_\_\_\_\_$.
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46.4k
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519
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asked
Feb 16
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numerical-answers
number-system
algebra
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28
GATE ECE 2023 | Question: 28
Let $\boldsymbol{x}$ be an $n \times 1$ real column vector with length $l=\sqrt{\boldsymbol{x}^{T} \boldsymbol{x}}$ The trace of the matrix $P=\boldsymbol{x} \boldsymbol{x}^{T}$ is $l^{2}$ $\frac{l^{2}}{4}$ $l$ $\frac{l^{2}}{2}$
Let $\boldsymbol{x}$ be an $n \times 1$ real column vector with length $l=\sqrt{\boldsymbol{x}^{T} \boldsymbol{x}}$ The trace of the matrix $P=\boldsymbol{x} \boldsymbol{...
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46.4k
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512
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May 20, 2023
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gateece-2023
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29
GATE ECE 2023 | Question: 24
For the circuit shown below, the propagation delay of each $ \mathrm{NAND}$ gate is $1 \mathrm{~ns}$. The critical path delay, in $\text{ns,}$ is______________(rounded off to the nearest integer).
For the circuit shown below, the propagation delay of each $ \mathrm{NAND}$ gate is $1 \mathrm{~ns}$. The critical path delay, in $\text{ns,}$ is______________(rounded of...
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46.4k
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499
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admin
asked
May 20, 2023
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gateece-2023
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GATE ECE 2005 | Question: 57
The given figure shows a ripple counter using positive edge triggered flip-flops. If the present state of the counter is $Q_{2} \; Q_{1} \; Q_{0}=011$, then its next state $\left(Q_{2} \; Q_{1} \; Q_{n}\right)$ will be $010$ $100$ $111$ $101$
The given figure shows a ripple counter using positive edge triggered flip-flops. If the present state of the counter is $Q_{2} \; Q_{1} \; Q_{0}=011$, then its next stat...
admin
46.4k
points
480
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admin
asked
Sep 22, 2022
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gate2005-ec
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31
GATE ECE 2024 | Question: 8
For the closed loop amplifier circuit shown below, the magnitude of open loop low frequency small signal voltage gain is $40$. All the transistors are biased in saturation. The current source $I_{S S}$ is ideal. Neglect body effect, channel length modulation and intrinsic device ... off to three decimal places) is $\_\_\_\_\_\_$. $0.976$ $1.000$ $1.025$ $0.488$
For the closed loop amplifier circuit shown below, the magnitude of open loop low frequency small signal voltage gain is $40$. All the transistors are biased ...
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46.4k
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475
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Feb 16
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amplifier
feedback-systems
small-signal
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32
GATE ECE 2022 | Question: 1
Consider the two-dimensional vector field $\overrightarrow{\rm F}(x, y) = x \overrightarrow{i} + y \overrightarrow{j},$ where $\overrightarrow{i}$ and $\overrightarrow{j}$ denote the unit vectors along the $x - $axis and the $y - $ ... $0$ $1$ $8 + 2 \pi$ $ - 1$
Consider the two-dimensional vector field $\overrightarrow{\rm F}(x, y) = x \overrightarrow{i} + y \overrightarrow{j},$ where $\overrightarrow{i}$ and $\overrightarrow{j}...
Arjun
6.6k
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468
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Feb 15, 2022
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33
GATE ECE 2024 | Question: 22
In the circuit given below, the switch $\text{S}$ was kept open for a sufficiently long time and is closed at time $t=0$. The time constant (in seconds) of the circuit for $t>0$ is $\_\_\_\_\_\_$.
In the circuit given below, the switch $\text{S}$ was kept open for a sufficiently long time and is closed at time $t=0$. The time constant (in seconds) of the circuit fo...
admin
46.4k
points
459
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admin
asked
Feb 16
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gateece-2024
numerical-answers
rlc-circuits
mos-capacitor
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34
GATE ECE 2023 | Question: 11
In the circuit shown below, $\text{V}_1$ and $\text{V}_2$ are bias voltages. Based on input and output impedances, the circuit behaves as a voltage controlled voltage source. voltage controlled current source. current controlled voltage source. current controlled current source.
In the circuit shown below, $\text{V}_1$ and $\text{V}_2$ are bias voltages. Based on input and output impedances, the circuit behaves as avoltage controlled voltage sour...
admin
46.4k
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447
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admin
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May 20, 2023
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gateece-2023
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35
GATE ECE 2023 | Question: 2
The rate of increase, of a scalar field $f(x, y, z)=x y z$, in the direction $v=(2,1,2)$ at a point $(0,2,1)$ is $\frac{2}{3}$ $\frac{4}{3}$ $2$ $4$
The rate of increase, of a scalar field $f(x, y, z)=x y z$, in the direction $v=(2,1,2)$ at a point $(0,2,1)$ is$\frac{2}{3}$$\frac{4}{3}$$2$$4$
admin
46.4k
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435
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admin
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May 20, 2023
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gateece-2023
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36
GATE ECE 2006 | Question: 43
A new Binary Coded Pentary (BCP) number system is proposed in which every digit of a base-$5$ number is represented by tis corresponding $3$-bit binary code. For example, the base-$5$ number $24$ ... numbering system, the BCP code $100010011001$ corresponds to the following number in base-$5$ system $423$ $1324$ $2201$ $4231$
A new Binary Coded Pentary (BCP) number system is proposed in which every digit of a base-$5$ number is represented by tis corresponding $3$-bit binary code. For example,...
admin
46.4k
points
418
views
admin
asked
Sep 20, 2022
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gate2006-ec
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37
GATE ECE 2000 | Question 2.12
One period $(0, T)$ each of two periodic waveforms $W_{1}$ and $W_{2}$ are shown in figure. The magnitudes of the $n$th Fourier series coefficients of $W_{1}$ and $W_{2}$. for $n \geq 1, n$ odd, are respectively proportional to $n^{-3} \mid$ and $n^{-2} \mid$ $n^{-2} \mid$ and $n^{-3} \mid$ $n^{-1}$ and $n^{-2} \mid$ $n^{-4} \mid$ and $n^{-2} \mid$
One period $(0, T)$ each of two periodic waveforms $W_{1}$ and $W_{2}$ are shown in figure. The magnitudes of the $n$th Fourier series coefficients of $W_{1}$ and $W_{2}$...
admin
46.4k
points
410
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admin
asked
Sep 29, 2022
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gate2000-ec
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GATE ECE 2024 | Question: 55
The photocurrent of a $\text{PN}$ junction diode solar cell is $1 \mathrm{~mA}$. The voltage corresponding to its maximum power point is $0.3 \mathrm{~V}$. If the thermal voltage is $30 \mathrm{mV}$, the reverse saturation current of the diode (in $\mathrm{nA}$, rounded off to two decimal places) is $\_\_\_\_\_\_$.
The photocurrent of a $\text{PN}$ junction diode solar cell is $1 \mathrm{~mA}$. The voltage corresponding to its maximum power point is $0.3 \mathrm{~V}$. If the thermal...
admin
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Feb 16
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p-n-junction-diode
numerical-answers
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39
GATE ECE 2022 | Question: 9
Consider the $ \text{2-bit}$ multiplexer $\text{(MUX)}$ shown in the figure. For $\text{OUTPUT}$ to be the $\text{XOR}$ of $\text{C}$ and $\text{D},$ the values for $A_{0}, A_{1}, A_{2},$ and $A_{3}$ are _______________. $A_{0} = 0, A_{1} = 0, A_{2} = 1, A_{3} = 1$ ... $A_{0} = 0, A_{1} = 1, A_{2} = 1, A_{3} = 0$ $A_{0} = 1, A_{1} = 1, A_{2} = 0, A_{3} = 0$
Consider the $ \text{2–bit}$ multiplexer $\text{(MUX)}$ shown in the figure. For $\text{OUTPUT}$ to be the $\text{XOR}$ of $\text{C}$ and $\text{D},$ the values for $A_...
Arjun
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Arjun
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Feb 15, 2022
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gateece-2022
multiplexers
combinational-circuits
digital-circuits
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40
GATE ECE 2023 | Question: 4
The value of the contour integral, $\oint_C\left(\frac{z+2}{z^2+2 z+2}\right) d z$, where the contour $\mathrm{C}$ is $\left\{z:\left|z+1-\frac{3}{2} j\right|=1\right\}$, taken in the counter clockwise direction, is $-\pi(1+j)$ $\pi(1+j)$ $\pi(1-j)$ $-\pi(1-j)$
The value of the contour integral, $\oint_C\left(\frac{z+2}{z^2+2 z+2}\right) d z$, where the contour $\mathrm{C}$ is $\left\{z:\left|z+1-\frac{3}{2} j\right|=1\right\}$,...
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May 20, 2023
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