Recent questions tagged data-converters

A $4$-bit weighted-resistor DAC with inputs $b_{3}, b_{2}, b_{1}$, and $b_{0}$ (MSB to LSB) is designed using an ideal opamp, as shown below. The switches are closed when...

A sample and hold circuit is implemented using a resistive switch and a capacitor with a time constant of $1 \; \mu \mathrm{s}$. The time for the sampling switch to stay ...

An $8$ bit successive approximation analog to digital converter has full scale reading of $2.55 \mathrm{~V}$ and its conversion time for an analog input of $1 \mathrm{~V}...

The number of comparators in a $4$ bit flash $\text{ADC}$ is$4$$5$$15$$16$

For the $4$ bit $\text{DAC}$ shown, the output voltage $v_{0}$ is$10 \mathrm{~V}$$5 \mathrm{~V}$$4 \mathrm{~V}$$8 \mathrm{~V}$

The resolution of a $4$ - bit counting $\text{ADC}$ is $0.5$ volts. For an analog input of $6.6$ volts, the digital output of the $\text{ADC}$ will be$1011$$1101$$1100$$1...

A monochrome video signal that ranges from $0$ to $8 \mathrm{~V}$, is digitized using an $8$-bit $\mathrm{ADC}$.Determine the resolution of the $\mathrm{ADC}$ in $\mathrm...

The number of comparators required in a $3$-bit comparator type ADC is$2$$3$$7$$8$

The advantage of using a dual slope $\text{ADC}$ in a digital voltmeter is thatits conversion time is smallits accuracy is highit gives output in $\text{BCD}$ formatit do...

The minimum number of comparators required to build an $8$ bit flash ADC is$8$$63$$255$$256$

The circuit shown in the figure is a $4$ bit $\text{DAC}$The input bits $0$ and $1$ are represented by $0$ and $5 \mathrm{~V}$ respectively. The $\text{OP AMP}$ is ideal,...

Statement for Linked Answer Questions 83a and 83b:Asymmetric three-level midtread quantizer is to be designed assuming equiprobable occurence of all quantization levels.I...

A $\text{PAM}$ signal can be detected by usingan $\text{ADC}$an integratora band pass filtera high pass filter

The signal to quantisation noise ratio in an $n$-bit $\text{PCM}$ systemdepends upon the sampling frequency employedis independent of the value of ' $n$ 'increases with i...

For an $\text{ADC}$, match the following(A) Flash converter(B) Dual slope converter(C) Successive approximation converterrequires a conversion time of the order of a few ...

A $12$ – bit $\text{ADC}$ is operating with a $1 \; \mu \; \mathrm{sec}$ clock period and the total conversion time is seen to be $14 \; \mu \;\mathrm{sec}$. The $\text{A...

A dynamic $\text{RAM}$ cell which hold $5 \mathrm{~V}$ has to be refreshed every $20 \mathrm{~m}$ secs, so that the stored voltage does not fall by more than $0.5 \mathrm...

A $10$ - bit $\text{ADC}$ with a full scale output voltage of $10.24 \mathrm{~V}$ is designed to have $\mathrm{a} \pm \mathrm{LSB} / 2$ accuracy. If the $\mathrm{ADC}$ is...

A $4$-bit D/A converter is connected to a free-running $3$-bit UP counter, as shown in the following figure. Which of the following waveforms will be observed at $V_{0}$?...

Type of $\mathrm{ADC}$(A) Successive approximation(1) $1$(B) Dual-slope(2) $8$(C) Parallel Comparator(3) $16$ (4) $256$ (5) $512$ Maximum conversion for $8$-bit $\text{AD...

In the Digital-to-Analog converter circuit shown in the figure below, $V_{R}=10 \mathrm{~V}$ and $\mathrm{R}=10 \; \mathrm{k} \Omega$.The current $i$ is$31.25 \; \mu \mat...

In the Digital-to-Analog converter circuit shown in the figure below, $V_{R}=10 \mathrm{~V}$ and $\mathrm{R}=10 \; \mathrm{k} \Omega$.The voltage $V_{o}$ is$-0.781 \mathr...

In the following circuit, the comparator output is logic $\text{“1”}$ if $\mathrm{V}_{1}>\mathrm{V}_{2}$ and is logic $\text{“0”}$ otherwise. The D/A conversion is done a...

Dual-slope integration type Analog-to-digital converters providehigher speeds compared to all other types of $\text{A/D}$ convertersvery good accuracy without putting ext...

The output of a $3$-stage Johnson (twisted-ring) counter is fed to a digital-to-analog (D/A) converter as shown in the figure below. Assume all states of the counter to b...

An $8$-bit unipolar (all analog output values are positive) digital-to-analog converter $\text{(DAC)}$ has a full-scale voltage range from $0\; V$ to $7.68\:V$. If the di...

A $10$-bit D/A converter is calibrated over the full range from $0$ to $10$ V. If the input to the D/A converter is $13 \:A$ (in hex), the output ( rounded off to three d...