Register

GATE ECE 2014 Set 1 | Question: 16

• recategorized by
1,098 views

1 Answer

0 0 votes
the question is for asynchronous circuit(ripple counters) the output of the flip flop is given as input to the next flip flop.

here the diagram is reversed to be asynchronous circuit

hence the lsb is Q0.

asking for Q3, which is 4th flip flop.

1 flip flop divides the frequency by 2.

thus,  frequency of the waveform of Q3 = 1MHz / 4 = 62.5 KHz
Answer:
← Previous · GATE ECE 2014 Set 1 ...Next → · GATE ECE 2014 Set 1 ...
← Previous in category · GATE ECE 2014 Set 1 ...Next in category → · GATE ECE 2014 Set 3 ...
Position:
Show:
Voting & Accepting an answer helps improve the community

Related questions

4 4 votes
1 answers 1 answer
1.3k
1.3k views
Milicevic3306 asked Mar 25, 2018
1,274 views
GATE ECE 2014 Set 1 | Question: 41
Consider the Boolean function $F(w,x,y,z) = wy + xy + \overline{w}\:xyz + \overline{w}\:\overline{x}\:y + xz + \overline{x}\:\overline{y}\:\overline{z}.$ Which one of th...
1 1 vote
1 1 answer
1.2k
1.2k views
Milicevic3306 asked Mar 25, 2018
1,203 views
GATE ECE 2014 Set 1 | Question: 42
The digital logic shown in the figure satisfies the given state diagram when $Q1$ is connected to input $A$ of the XOR gate.Suppose the XOR gate is replaced by an XNOR ga...
0 0 votes
0 0 answers
689
689 views
Milicevic3306 asked Mar 26, 2018
689 views
GATE ECE 2014 Set 3 | Question: 15
The circuit shown in the figure is a Toggle Flip FlopJK Flip FlopSR LatchMaster-Slave D Flip Flop
2 2 votes
0 0 answers
741
741 views
Milicevic3306 asked Mar 25, 2018
741 views
GATE ECE 2014 Set 1 | Question: 40
The output $F$ in the digital logic circuit shown in the figure is$F = \overline{X}\:Y\:Z + X\:\overline{Y}\:Z$$F = \overline{X}\:Y\:\overline{Z} + X\:\overline{Y}\:\over...

Add Synced Question

×