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41
GATE ECE 2016 Set 2 | Question: 11
The Ebers-Moll model of a $BJT$ is valid only in active mode only in active and saturation modes only in active and cut-off modes in active, saturation and cut-off modes
The Ebers-Moll model of a $BJT$ is valid only in active modeonly in active and saturation modesonly in active and cut-off modesin active, saturation and cut-off modes
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42
GATE ECE 2015 Set 2 | Question: 39
The diode in the circuit given below has $V_{ON} = 0.7\:V$ but is ideal otherwise. The current $(\text{in}\: mA)$ in the $4\: k\Omega$ resistor is _______.
The diode in the circuit given below has $V_{ON} = 0.7\:V$ but is ideal otherwise. The current $(\text{in}\: mA)$ in the $4\: k\Omega$ resistor is _______.
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43
GATE ECE 2015 Set 3 | Question: 9
Which one of the following processes is preferred to form the gate dielectric $(SiO_{2})$ of MOSFETs ? Sputtering Molecular beam epitaxy Wet oxidation Dry oxidation
Which one of the following processes is preferred to form the gate dielectric $(SiO_{2})$ of MOSFETs ? Sputtering Molecular beam epitaxy Wet oxidation Dry oxidation
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44
GATE ECE 2016 Set 1 | Question: 18
What is the voltage $V_{out}$ in the following circuit ? $0 V$ ($\mid V_T$ of PMOS$\mid$ + $V_T$ of NMOS)$/2$ Switching threshold of inverter $V_{DD}$
What is the voltage $V_{out}$ in the following circuit ?$0 V$($\mid V_T$ of PMOS$\mid$ + $V_T$ of NMOS)$/2$Switching threshold of inverter$V_{DD}$
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45
GATE ECE 2016 Set 1 | Question: 33
An AC voltage source $V = 10 \sin(t)$ volts is applied to the following network. Assume that $R_1 = 3 k\Omega$, $R_2 = 6 k\Omega$ and $R_3 = 9k\Omega$, and that the diode is ideal. RMS current $I_{rms}$(in mA) through the diode is _______
An AC voltage source $V = 10 \sin(t)$ volts is applied to the following network. Assume that $R_1 = 3 k\Omega$, $R_2 = 6 k\Omega$ and $R_3 = 9k\Omega$, and that the diode...
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46
GATE ECE 2015 Set 3 | Question: 11
In the circuit shown in the figure, the BJT has a current gain $(\beta)$ of $50.$ For an emitter-base voltage ܸ $V_{EB} = 600\: mV,$ the emitter-collector voltage $V_{EC}$ (in Volts) is _______.
In the circuit shown in the figure, the BJT has a current gain $(\beta)$ of $50.$ For an emitter-base voltage ܸ $V_{EB} = 600\: mV,$ the emitter-collector voltage $V_{EC...
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49
GATE ECE 2015 Set 3 | Question: 18
Consider a four-point moving average filter defined by the equation $y[n] = \displaystyle{}\sum _{i=0}^{3}\alpha_{i}\:x[n-i].$ ... $\alpha_{1} = \alpha_{2} = 0;\:\alpha_{0} = \alpha_{3}$
Consider a four-point moving average filter defined by the equation $y[n] = \displaystyle{}\sum _{i=0}^{3}\alpha_{i}\:x[n-i].$ The condition on the filter coefficients t...
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50
GATE ECE 2014 Set 4 | Question: 39
For the common collector amplifier shown in the figure, the BJT has high $\beta$, negligible $V_{CE(sat)}$, and $V_{BE}=0.7 \: V$. The maximum undistorted peak-to-peak output voltage $v_o$ (in Volts) is __________
For the common collector amplifier shown in the figure, the BJT has high $\beta$, negligible $V_{CE(sat)}$, and $V_{BE}=0.7 \: V$. The maximum undistorted peak-to-peak ou...
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52
GATE ECE 2015 Set 2 | Question: 12
In the circuit shown, $V_{0} = V_{0A}$ for switch $SW$ in position $A$ and $V_{0} = V_{0B}$ for $SW$ in position $B$. Assume that the opamp is ideal. The value of $\dfrac{V_{0B}}{V_{0A}}$ is ___________.
In the circuit shown, $V_{0} = V_{0A}$ for switch $SW$ in position $A$ and $V_{0} = V_{0B}$ for $SW$ in position $B$. Assume that the opamp is ideal. The value of $\dfrac...
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53
GATE ECE 2014 Set 1 | Question: 12
In the ac equivalent circuit shown in the figure, if $i_{in}$ is the input current and $R_{F}$ is very large, the type of feedback is voltage-voltage feedback voltage-current feedback current-voltage feedback current-current feedback
In the ac equivalent circuit shown in the figure, if $i_{in}$ is the input current and $R_{F}$ is very large, the type of feedback isvoltage-voltage feedbackvoltage-curre...
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54
GATE ECE 2015 Set 3 | Question: 13
In the circuit shown, assume that diodes $D_{1}$ and $D_{2}$ are ideal. In the steady state condition, the average voltage $V_{ab}$ (in Volts) across the $0.5\: \mu F$ capacitor is ______.
In the circuit shown, assume that diodes $D_{1}$ and $D_{2}$ are ideal. In the steady state condition, the average voltage $V_{ab}$ (in Volts) across the $0.5\: \mu F$ ca...
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55
GATE ECE 2015 Set 3 | Question: 39
In the circuit shown, assume that the opamp is ideal. If the gain $(v_{0} / v_{in})$ is $–12,$ the value of $R\: (\text{in}\: k\Omega)$ is _____.
In the circuit shown, assume that the opamp is ideal. If the gain $(v_{0} / v_{in})$ is $–12,$ the value of $R\: (\text{in}\: k\Omega)$ is _____.
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58
GATE ECE 2015 Set 1 | Question: 34
A MOSFET in saturation has a drain current of $1$ mA for $V_{DS} =0.5 \: V$. If the channel length modulation coefficient is $0.05 \: V^{-1}$, the output resistance (in $k \Omega$) of the MOSFET is ___________.
A MOSFET in saturation has a drain current of $1$ mA for $V_{DS} =0.5 \: V$. If the channel length modulation coefficient is $0.05 \: V^{-1}$, the output resistance (in $...
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59
GATE ECE 2015 Set 2 | Question: 8
The $2$-port admittance matrix of the circuit shown is given by $\begin{bmatrix}0.3 &0.2 \\0.2 &0.3 \end{bmatrix}$ $\begin{bmatrix} 15&5 \\5 &15 \end{bmatrix}$ $\begin{bmatrix} 3.33&5 \\5 &3.33 \end{bmatrix}$ $\begin{bmatrix} 0.3&0.4 \\0.4 &0.3 \end{bmatrix}$
The $2$-port admittance matrix of the circuit shown is given by$\begin{bmatrix}0.3 &0.2 \\0.2 &0.3 \end{bmatrix}$$\begin{bmatrix} 15&5 \\5 &15 \end{bmatrix}$$\begin{bmatr...
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60
GATE ECE 2015 Set 3 | Question: 41
In the circuit shown, assume that the diodes $D1$ and $D2$ are ideal. The average value of voltage $V_{ab}\: (\text{in Volts}),$ across terminals $‘a’$ and $‘b’$ is _________.
In the circuit shown, assume that the diodes $D1$ and $D2$ are ideal. The average value of voltage $V_{ab}\: (\text{in Volts}),$ across terminals $‘a’$ and $‘b’$ ...
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61
GATE ECE 2015 Set 1 | Question: 40
In the circuit shown, assume that the opamp is ideal. The bridge output voltage $V_0$ (in mV) for $\delta=0.05$ is __________
In the circuit shown, assume that the opamp is ideal. The bridge output voltage $V_0$ (in mV) for $\delta=0.05$ is __________
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62
GATE ECE 2015 Set 1 | Question: 39
For the NMOSFET in the circuit shown, the threshold voltage is $V_{th}$, where $V_{th}>0$. The source voltage $V_{SS}$ is varied from $0$ to $V_{DD}$. Neglecting the channel length modulation, the drain current $I_D$ as a function of $V_{SS}$ is represented by
For the NMOSFET in the circuit shown, the threshold voltage is $V_{th}$, where $V_{th}>0$. The source voltage $V_{SS}$ is varied from $0$ to $V_{DD}$. Neglecting the chan...
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63
GATE ECE 2015 Set 3 | Question: 8
At very high frequencies, the peak output voltage $V_{0}$ (in Volts) is _______.
At very high frequencies, the peak output voltage $V_{0}$ (in Volts) is _______.
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64
GATE ECE 2014 Set 1 | Question: 10
If fixed positive charges are present in the gate oxide of an $n$-channel enhancement type MOSFET, it will lead to a decrease in the threshold voltage channel length modulation an increase in substrate leakage current an increase in accumulation capacitance
If fixed positive charges are present in the gate oxide of an $n$-channel enhancement type MOSFET, it will lead to a decrease in the threshold voltagechannel length modul...
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67
GATE ECE 2014 Set 1 | Question: 34
A BJT is biased in forward active mode. Assume $V_{EE} = 0.7\:V, \: kT/q = 25\:mV$ and reverse saturation current $I_{S} = 10^{-13}\:A.$ The transconductance of the BJT (in $mA/V$) is __________
A BJT is biased in forward active mode. Assume $V_{EE} = 0.7\:V, \: kT/q = 25\:mV$ and reverse saturation current $I_{S} = 10^{-13}\:A.$ The transconductance of the BJT ...
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70
GATE ECE 2013 | Question: 41
In the circuit shown below the $\text{op-amps}$ are ideal. Then $V_{\text{out}}$ in $\text{Volts}$ is $4$ $6$ $8$ $10$
In the circuit shown below the $\text{op-amps}$ are ideal. Then $V_{\text{out}}$ in $\text{Volts}$ is$4$$6$$8$$10$
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72
GATE ECE 2014 Set 2 | Question: 9
An increase in the base recombination of a BJT will increase the common emitter dc current gain $\beta$ the breakdown voltage $BV_{CEO}$ the unity-gain cut-off frequency $f_{T}$ the transconductance $g_{m}$
An increase in the base recombination of a BJT will increasethe common emitter dc current gain $\beta$the breakdown voltage $BV_{CEO}$the unity-gain cut-off frequency $f_...
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73
GATE ECE 2014 Set 1 | Question: 13
In the low-pass filter shown in the figure, for a cut-off frequency of $5\:kHz,$ the value of $R_{2}\:(\text{in}\:k\Omega)$ is ______.
In the low-pass filter shown in the figure, for a cut-off frequency of $5\:kHz,$ the value of $R_{2}\:(\text{in}\:k\Omega)$ is ______.
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74
GATE ECE 2014 Set 4 | Question: 13
The circuit shown represents a bandpass filter a voltage controlled oscillator an amplitude modulator a monostable multivibrator
The circuit shown representsa bandpass filtera voltage controlled oscillatoran amplitude modulatora monostable multivibrator
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77
GATE ECE 2014 Set 3 | Question: 11
The desirable characteristics of a transconductance amplifier are high input resistance and high output resistance high input resistance and low output resistance low input resistance and high output resistance low input resistance and low output resistance
The desirable characteristics of a transconductance amplifier are high input resistance and high output resistancehigh input resistance and low output resistancelow input...
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78
GATE ECE 2014 Set 1 | Question: 39
For the amplifier shown in the figure, the BJT parameters are $V_{BE} = 0.7\:V, \beta = 200,$ and thermal voltage $V_{T} = 25\:mV.$ The voltage gain $(v_{0}/v_{i})$ of the amplifier is ______.
For the amplifier shown in the figure, the BJT parameters are $V_{BE} = 0.7\:V, \beta = 200,$ and thermal voltage $V_{T} = 25\:mV.$ The voltage gain $(v_{0}/v_{i})$ of th...
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79
GATE ECE 2014 Set 1 | Question: 38
In the circuit shown the op-amp has finite input impedance, infinite voltage gain, and zero input offset voltage. The output voltage $V_{out}$ is $-I_{2}(R_{1} + R_{2})$ $I_{2}R_{2}$ $I_{1}R_{2}$ $-I_{1}(R_{1} + R_{2})$
In the circuit shown the op-amp has finite input impedance, infinite voltage gain, and zero input offset voltage. The output voltage $V_{out}$ is $-I_{2}(R_{1} + R_{2})$$...
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