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42
GATE ECE 2016 Set 1 | Question: 42
Identify the circuit below. Binary to Gray code converter Binary to XS3 converter Gray to Binary converter XS3 to Binary converter
Identify the circuit below.Binary to Gray code converterBinary to XS3 converterGray to Binary converterXS3 to Binary converter
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44
GATE ECE 2015 Set 3 | Question: 30
In the circuit shown, the current $I$ flowing through the $50\;\Omega$ resistor will be zero if the value of capacitor $C (\text{in}\: \mu F)$ is ______.
In the circuit shown, the current $I$ flowing through the $50\;\Omega$ resistor will be zero if the value of capacitor $C (\text{in}\: \mu F)$ is ______.
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46
GATE ECE 2015 Set 3 | Question: 55
A coaxial capacitor of inner radius $1\: mm$ and outer radius $5\: mm$ has a capacitance per unit length of $172\: pF/m.$ If the ratio of outer radius to inner radius is doubled, the capacitance per unit length $\text{(in}\: pF/m)$ is ________.
A coaxial capacitor of inner radius $1\: mm$ and outer radius $5\: mm$ has a capacitance per unit length of $172\: pF/m.$ If the ratio of outer radius to inner radius is ...
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52
GATE ECE 2015 Set 1 | Question: 8
In the given circuit, the values of $V_1$ and $V_2$ respectively are $5$ V, $25$ V $10$ V, $30$ V $15$ V, $35$ V $0$ V, $20$ V
In the given circuit, the values of $V_1$ and $V_2$ respectively are$5$ V, $25$ V$10$ V, $30$ V$15$ V, $35$ V$0$ V, $20$ V
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55
GATE ECE 2015 Set 1 | Question: 12
In the circuit shown below, the Zener diode is ideal and the Zener voltage is $6$ V. The output voltage $V_o$ (in volts) is ________.
In the circuit shown below, the Zener diode is ideal and the Zener voltage is $6$ V. The output voltage $V_o$ (in volts) is ________.
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56
GATE ECE 2015 Set 1 | Question: 13
In the circuit shown, the switch SW is thrown from position $A$ to position $B$ at time $t=0$. The energy (in $\mu J$) taken from the $3$ V source to charge the $0.1 \: \mu F$ capacitor from $0$ V t $3$ V is $0.3$ $0.45$ $0.9$ $3$
In the circuit shown, the switch SW is thrown from position $A$ to position $B$ at time $t=0$. The energy (in $\mu J$) taken from the $3$ V source to charge the $0.1 \: \...
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58
GATE ECE 2015 Set 1 | Question: 33
The built-in potential of an abrupt p-n junction is $0.75$ V. If its junction capacitance $(C_J)$ at a reverse bias $(V_R)$ of $1.25 \: V$ is $5$ pF, the value of $C_J$ (in pF) when $V_R = 7.25 \: V$ is ________.
The built-in potential of an abrupt p-n junction is $0.75$ V. If its junction capacitance $(C_J)$ at a reverse bias $(V_R)$ of $1.25 \: V$ is $5$ pF, the value of $C_J$ (...
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60
GATE ECE 2014 Set 4 | Question: 7
The magnitude of current (in mA) through the resistor $R_2$ in the figure shown is __________
The magnitude of current (in mA) through the resistor $R_2$ in the figure shown is __________
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62
GATE ECE 2014 Set 4 | Question: 10
The cut-off wavelength (in $\mu m$) of light that can be used for intrinsic excitation of a semiconductor material of bandgap $E_g = 1.1 \: eV$ is ______________
The cut-off wavelength (in $\mu m$) of light that can be used for intrinsic excitation of a semiconductor material of bandgap $E_g = 1.1 \: eV$ is ______________
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66
GATE ECE 2014 Set 3 | Question: 7
In the figure shown, the value of the current $I$ (in Amperes) is __________.
In the figure shown, the value of the current $I$ (in Amperes) is __________.
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67
GATE ECE 2014 Set 3 | Question: 8
In MOSFET fabrication, the channel length is defined during the process of isolation oxide growth channel stop implantation poly-silicon gate patterning lithography step leading to the contact pads
In MOSFET fabrication, the channel length is defined during the process ofisolation oxide growthchannel stop implantationpoly-silicon gate patterninglithography step lead...
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69
GATE ECE 2014 Set 3 | Question: 10
At $T= 300 \: K$, the hole mobility of a semiconductor $\mu _{p}= 500$ $cm^{2}$/V-s$ and $\frac{kT}{q}= 26$ $mV$. The hole diffusion constant $D_{p}$ in $cm^{2}$/s$ is _________
At $T= 300 \: K$, the hole mobility of a semiconductor $\mu _{p}= 500$ $cm^{2}$$/V-s$ and $\frac{kT}{q}= 26$ $mV$. The hole diffusion constant $D_{p}$ in $cm^{2}$$/s$ is ...
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70
GATE ECE 2014 Set 3 | Question: 12
In the circuit shown, the $PNP$ transistor has $\mid V_{BE} \mid = 0.7 \:V$ and $\beta = 50$. Assume that $R_{B}= 100 \: k \Omega$. For $V_{0}$ to be $5 \: V$, the value of $R_{C}$ (in $k \Omega$) is ________
In the circuit shown, the $PNP$ transistor has $\mid V_{BE} \mid = 0.7 \:V$ and $\beta = 50$. Assume that $R_{B}= 100 \: k \Omega$. For $V_{0}$ to be $5 \: V$, the value...
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71
GATE ECE 2014 Set 3 | Question: 31
In the circuit shown in the figure, the value of node voltage $V_{2}$ is $22+j$ $2$ $V$ $2 +j$ $22$ $V$ $22 -j$ $2$ $V$ $2 -j$ $22$ $V$
In the circuit shown in the figure, the value of node voltage $V_{2}$ is $22+j$ $2$ $V$ $2 +j$ $22$ $V$$22 -j$ $2...
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76
GATE ECE 2014 Set 2 | Question: 7
In the figure shown, the ideal switch has been open for a long time. If it is closed at t = 0, then the magnitude of the current (in mA) through the $4k \Omega$ resistor at $t= 0^{+}$ is ________.
In the figure shown, the ideal switch has been open for a long time. If it is closed at t = 0, then the magnitude of the current (in mA) through the $4k \Omega$ resistor ...
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78
GATE ECE 2014 Set 2 | Question: 10
In CMOS technology, shallow P-well or N-well regions can be formed using low pressure chemical vapour deposition low energy sputtering low temperature dry oxidation low energy ion-implantation
In CMOS technology, shallow P-well or N-well regions can be formed usinglow pressure chemical vapour deposition low energy sputteringlow temperature dry oxidationlow ener...
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