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2241
GATE ECE 2015 Set 3 | Question: 1
For $A = \begin{bmatrix} 1 &\tan x \\ -\tan x &1 \end{bmatrix},$ the determinant of $A^{T}A^{-1}$ is $\sec^{2}x$ $\cos 4x$ $1$ $0$
For $A = \begin{bmatrix} 1 &\tan x \\ -\tan x &1 \end{bmatrix},$ the determinant of $A^{T}A^{-1}$ is$\sec^{2}x$$\cos 4x$$1$$0$
Milicevic3306
16.0k
points
97
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Milicevic3306
asked
Mar 27, 2018
Linear Algebra
gate2015-ec-3
linear-algebra
matrices
determinant
+
–
0
votes
0
answers
2242
GATE ECE 2015 Set 3 | Question: 2
The contour on the $x-y$ plane, where the partial derivative of $x^{2} + y^{2}$ with respect to $y$ is equal to the partial derivative of $6y+4x$ with respect to $x$, is $y=2$ $x=2$ $x+y=4$ $x-y=0$
The contour on the $x-y$ plane, where the partial derivative of $x^{2} + y^{2}$ with respect to $y$ is equal to the partial derivative of $6y+4x$ with respect to $x$, is$...
Milicevic3306
16.0k
points
136
views
Milicevic3306
asked
Mar 27, 2018
Calculus
gate2015-ec-3
calculus
derivatives
partial-derivatives
+
–
0
votes
0
answers
2243
GATE ECE 2015 Set 3 | Question: 3
If $C$ is a circle of radius $r$ with centre $z_{0},$ in the complex $z$-plane and if $n$ is a non-zero integer, then $\oint _{C}\frac{dz}{(z-z_{0})^{n+1}}$ equals $2\pi n j$ $0$ $\frac{nj}{2\pi}$ $2\pi n$
If $C$ is a circle of radius $r$ with centre $z_{0},$ in the complex $z$-plane and if $n$ is a non-zero integer, then $\oint _{C}\frac{dz}{(z-z_{0})^{n+1}}$ equals$2\pi n...
Milicevic3306
16.0k
points
140
views
Milicevic3306
asked
Mar 27, 2018
Complex Analysis
gate2015-ec-3
vector-analysis
+
–
0
votes
0
answers
2244
GATE ECE 2015 Set 3 | Question: 4
Consider the function $g(t) = e^{-t}\sin(2\pi t)u(t)$ where $u(t)$ is the unit step function. The area under $g(t)$ is ______.
Consider the function $g(t) = e^{-t}\sin(2\pi t)u(t)$ where $u(t)$ is the unit step function. The area under $g(t)$ is ______.
Milicevic3306
16.0k
points
228
views
Milicevic3306
asked
Mar 27, 2018
Vector Analysis
gate2015-ec-3
numerical-answers
vector-analysis
+
–
0
votes
0
answers
2245
GATE ECE 2015 Set 3 | Question: 5
The value of $\displaystyle{}\sum_{n=0}^{\infty} n \left(\dfrac{1}{2}\right)^{n}$ is ________.
The value of $\displaystyle{}\sum_{n=0}^{\infty} n \left(\dfrac{1}{2}\right)^{n}$ is ________.
Milicevic3306
16.0k
points
99
views
Milicevic3306
asked
Mar 27, 2018
Calculus
gate2015-ec-3
numerical-answers
calculus
taylor-series
+
–
0
votes
0
answers
2246
GATE ECE 2015 Set 3 | Question: 6
For the circuit shown in the figure, the Thevenin equivalent voltage (in Volts) across terminals $a-b$ is _______.
For the circuit shown in the figure, the Thevenin equivalent voltage (in Volts) across terminals $a-b$ is _______.
Milicevic3306
16.0k
points
149
views
Milicevic3306
asked
Mar 27, 2018
Network Solution Methods
gate2015-ec-3
numerical-answers
network-solution-methods
thevenin-theorem
+
–
0
votes
0
answers
2247
GATE ECE 2015 Set 3 | Question: 9
In the circuit shown, the voltage $V_{X}$ (in Volts) is ________.
In the circuit shown, the voltage $V_{X}$ (in Volts) is ________.
Milicevic3306
16.0k
points
148
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
analog-circuits
+
–
0
votes
0
answers
2248
GATE ECE 2015 Set 3 | Question: 8
At very high frequencies, the peak output voltage $V_{0}$ (in Volts) is _______.
At very high frequencies, the peak output voltage $V_{0}$ (in Volts) is _______.
Milicevic3306
16.0k
points
76
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
numerical-answers
analog-circuits
+
–
0
votes
0
answers
2249
GATE ECE 2015 Set 3 | Question: 9
Which one of the following processes is preferred to form the gate dielectric $(SiO_{2})$ of MOSFETs ? Sputtering Molecular beam epitaxy Wet oxidation Dry oxidation
Which one of the following processes is preferred to form the gate dielectric $(SiO_{2})$ of MOSFETs ? Sputtering Molecular beam epitaxy Wet oxidation Dry oxidation
Milicevic3306
16.0k
points
108
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
analog-circuits
mosfet
+
–
0
votes
0
answers
2250
GATE ECE 2015 Set 3 | Question: 10
If the base width in a bipolar junction transistor is doubled, which one of the following statements will be TRUE? Current gain will increase Unity gain frequency will increase Emitter-base junction capacitance will increase Early Voltage will increase
If the base width in a bipolar junction transistor is doubled, which one of the following statements will be TRUE? Current gain will increase Unity gain frequency will in...
Milicevic3306
16.0k
points
182
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
analog-circuits
transistor
+
–
0
votes
0
answers
2251
GATE ECE 2015 Set 3 | Question: 11
In the circuit shown in the figure, the BJT has a current gain $(\beta)$ of $50.$ For an emitter-base voltage ܸ $V_{EB} = 600\: mV,$ the emitter-collector voltage $V_{EC}$ (in Volts) is _______.
In the circuit shown in the figure, the BJT has a current gain $(\beta)$ of $50.$ For an emitter-base voltage ܸ $V_{EB} = 600\: mV,$ the emitter-collector voltage $V_{EC...
Milicevic3306
16.0k
points
105
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
numerical-answers
analog-circuits
bipolar-junction-transistor
+
–
0
votes
0
answers
2252
GATE ECE 2015 Set 3 | Question: 12
In the circuit shown using an ideal opamp, the $3$-dB cut-off frequency (in Hz) is _______.
In the circuit shown using an ideal opamp, the $3$-dB cut-off frequency (in Hz) is _______.
Milicevic3306
16.0k
points
147
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
numerical-answers
analog-circuits
op-amps
+
–
0
votes
0
answers
2253
GATE ECE 2015 Set 3 | Question: 13
In the circuit shown, assume that diodes $D_{1}$ and $D_{2}$ are ideal. In the steady state condition, the average voltage $V_{ab}$ (in Volts) across the $0.5\: \mu F$ capacitor is ______.
In the circuit shown, assume that diodes $D_{1}$ and $D_{2}$ are ideal. In the steady state condition, the average voltage $V_{ab}$ (in Volts) across the $0.5\: \mu F$ ca...
Milicevic3306
16.0k
points
90
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
numerical-answers
analog-circuits
+
–
0
votes
0
answers
2254
GATE ECE 2015 Set 3 | Question: 14
The circuit shown consists of J-K flip-flops, each with an active low asynchronous reset $(\overline{R_{d}}\:\text{input}).$ The counter corresponding to this circuit is a modulo-$5$ binary up counter a modulo-$6$ binary down counter a modulo-$5$ binary down counter a modulo-$6$ binary up counter
The circuit shown consists of J-K flip-flops, each with an active low asynchronous reset $(\overline{R_{d}}\:\text{input}).$ The counter corresponding to this circuit isa...
Milicevic3306
16.0k
points
225
views
Milicevic3306
asked
Mar 27, 2018
Network Solution Methods
gate2015-ec-3
network-solution-methods
flip-flops
+
–
0
votes
0
answers
2255
GATE ECE 2015 Set 3 | Question: 15
In the circuit shown, diodes $D_{1}, D_{2}$ and $D_{3}$ are ideal, and the inputs $E_{1} , E_{2}$ and $E_{3}$ are $“0\: V”$ for logic $‘0’$ and $“10\: V”$ for logic $‘1’$. What logic gate does the circuit represent? $3$-input OR gate $3$-input NOR gate $3$-input AND gate $3$-input XOR gate
In the circuit shown, diodes $D_{1}, D_{2}$ and $D_{3}$ are ideal, and the inputs $E_{1} , E_{2}$ and $E_{3}$ are $“0\: V”$ for logic $‘0’$ and $“10\: V”$ for...
Milicevic3306
16.0k
points
193
views
Milicevic3306
asked
Mar 27, 2018
Number Representations
gate2015-ec-3
digital-circuits
combinational-circuits
logic-gates
+
–
0
votes
0
answers
2256
GATE ECE 2015 Set 3 | Question: 16
Which one of the following $8085$ microprocessor programs correctly calculates the product of two $8$-bit numbers stored in registers $B$ and $C?$ ...
Which one of the following $8085$ microprocessor programs correctly calculates the product of two $8$-bit numbers stored in registers $B$ and $C?$$\begin{array}{ll} {} & ...
Milicevic3306
16.0k
points
109
views
Milicevic3306
asked
Mar 27, 2018
Digital Circuits
gate2015-ec-3
digital-circuits
microprocessor-8085
+
–
0
votes
0
answers
2257
GATE ECE 2015 Set 3 | Question: 17
The impulse response of an LTI system can be obtained by differentiating the unit ramp response differentiating the unit step response integrating the unit ramp response integrating the unit step response
The impulse response of an LTI system can be obtained by differentiating the unit ramp response differentiating the unit step response integrating the unit ramp response ...
Milicevic3306
16.0k
points
138
views
Milicevic3306
asked
Mar 27, 2018
Continuous-time Signals
gate2015-ec-3
continuous-time-signals
impulse-response
linear-time-invariant-systems
+
–
0
votes
0
answers
2258
GATE ECE 2015 Set 3 | Question: 18
Consider a four-point moving average filter defined by the equation $y[n] = \displaystyle{}\sum _{i=0}^{3}\alpha_{i}\:x[n-i].$ ... $\alpha_{1} = \alpha_{2} = 0;\:\alpha_{0} = \alpha_{3}$
Consider a four-point moving average filter defined by the equation $y[n] = \displaystyle{}\sum _{i=0}^{3}\alpha_{i}\:x[n-i].$ The condition on the filter coefficients t...
Milicevic3306
16.0k
points
101
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
analog-circuits
filters
+
–
0
votes
0
answers
2259
GATE ECE 2015 Set 3 | Question: 19
Consider the Bode plot shown in the figure. Assume that all the poles and zeros are real-valued. The value of $f_{H}\: – f_{L}\:( \text{in}\: Hz)$ is ___________.
Consider the Bode plot shown in the figure. Assume that all the poles and zeros are real-valued.The value of $f_{H}\: – f_{L}\:( \text{in}\: Hz)$ is ___________.
Milicevic3306
16.0k
points
194
views
Milicevic3306
asked
Mar 27, 2018
Control Systems
gate2015-ec-3
numerical-answers
control-systems
bode-and-root-locus-plots
+
–
0
votes
0
answers
2260
GATE ECE 2015 Set 3 | Question: 20
The phase margin (in degrees) of the system $G(s) = \dfrac{10}{s(s+10)}$ is _______.
The phase margin (in degrees) of the system $G(s) = \dfrac{10}{s(s+10)}$ is _______.
Milicevic3306
16.0k
points
147
views
Milicevic3306
asked
Mar 27, 2018
Continuous-time Signals
gate2015-ec-3
numerical-answers
continuous-time-signals
phase-delay
+
–
0
votes
0
answers
2261
GATE ECE 2015 Set 3 | Question: 21
The transfer function of a first-order controller is given as $G_{C}(s) = \dfrac{K(s+a)}{s+b}$where $K,a$ and ܾ$b$ are positive real numbers. The condition for this controller to act as a phase lead compensator is $a<b$ $a>b$ $K<ab$ $K>ab$
The transfer function of a first-order controller is given as $$G_{C}(s) = \dfrac{K(s+a)}{s+b}$$where $K,a$ and ܾ$b$ are positive real numbers. The condition for this c...
Milicevic3306
16.0k
points
164
views
Milicevic3306
asked
Mar 27, 2018
Network Solution Methods
gate2015-ec-3
network-solution-methods
transfer-function
+
–
0
votes
0
answers
2262
GATE ECE 2015 Set 3 | Question: 22
The modulation scheme commonly used for transmission from GSM mobile terminals is $4$-QAM $16$-PSK Walsh-Hadamard orthogonal codes Gaussian Minimum Shift Keying (GMSK)
The modulation scheme commonly used for transmission from GSM mobile terminals is$4$-QAM $16$-PSK Walsh-Hadamard orthogonal codes Gaussian Minimum Shift Keying (GMSK)
Milicevic3306
16.0k
points
153
views
Milicevic3306
asked
Mar 27, 2018
Communications
gate2015-ec-3
communications
gaussian-minimum-shift-keying
+
–
0
votes
0
answers
2263
GATE ECE 2015 Set 3 | Question: 23
A message signal $m(t) = A_{m} \sin(2πf_{m}t)$ is used to modulate the phase of a carrier $A_{c} \cos(2πf_{c}t)$ to get the modulated signal $y(t) = A_{c} \cos(2πf_{c}t + m(t)).$ The bandwidth of $y(t)$ depends on $A_{m}$ but not on $f_{m}$ depends on $f_{m}$ but not on $A_{m}$ depends on both $A_{m}$ and $f_{m}$ does not depend on $A_{m}$ or $f_{m}$
A message signal $m(t) = A_{m} \sin(2πf_{m}t)$ is used to modulate the phase of a carrier $A_{c} \cos(2πf_{c}t)$ to get the modulated signal $y(t) = A_{c} \cos(2πf_{c}...
Milicevic3306
16.0k
points
95
views
Milicevic3306
asked
Mar 27, 2018
Continuous-time Signals
gate2015-ec-3
communications
calculation-of-bandwidth
+
–
0
votes
0
answers
2264
GATE ECE 2015 Set 3 | Question: 24
The directivity of an antenna array can be increased by adding more antenna elements, as a larger number of elements improves the radiation efficiency increases the effective area of the antenna results in a better impedance matching allows more power to be transmitted by the antenna
The directivity of an antenna array can be increased by adding more antenna elements, as a larger number of elements improves the radiation efficiency increases the effec...
Milicevic3306
16.0k
points
100
views
Milicevic3306
asked
Mar 27, 2018
Electromagnetics
gate2015-ec-3
electromagnetics
antennas
+
–
0
votes
0
answers
2265
GATE ECE 2015 Set 3 | Question: 25
A coaxial cable is made of two brass conductors. The spacing between the conductors is filled with Teflon $(\varepsilon_{r} = 2.1, \tan \delta = 0).$ Which one of the following circuits can represent the lumped element model of a small piece of this cable having length $\Delta z$?
A coaxial cable is made of two brass conductors. The spacing between the conductors is filled with Teflon $(\varepsilon_{r} = 2.1, \tan \delta = 0).$ Which one of the fol...
Milicevic3306
16.0k
points
91
views
Milicevic3306
asked
Mar 27, 2018
Electromagnetics
gate2015-ec-3
electromagnetics
+
–
0
votes
0
answers
2266
GATE ECE 2015 Set 3 | Question: 26
The Newton-Raphson method is used to solve the equation $f(x) = x^{3} – 5x^{2} + 6x – 8 = 0.$ Taking the initial guess as $x = 5,$ the solution obtained at the end of the first iteration is __________.
The Newton-Raphson method is used to solve the equation $f(x) = x^{3} – 5x^{2} + 6x – 8 = 0.$ Taking the initial guess as $x = 5,$ the solution obtained at the end of...
Milicevic3306
16.0k
points
96
views
Milicevic3306
asked
Mar 27, 2018
Numerical Methods
gate2015-ec-3
numerical-answers
numerical-methods
+
–
0
votes
0
answers
2267
GATE ECE 2015 Set 3 | Question: 27
A fair die with faces $\{1, 2, 3, 4, 5, 6\}$ is thrown repeatedly till $’3’$ is observed for the first time. Let $X$ denote the number of times the die is thrown. The expected value of $X$ is _______.
A fair die with faces $\{1, 2, 3, 4, 5, 6\}$ is thrown repeatedly till $’3’$ is observed for the first time. Let $X$ denote the number of times the die is thrown. The...
Milicevic3306
16.0k
points
105
views
Milicevic3306
asked
Mar 27, 2018
Probability and Statistics
gate2015-ec-3
numerical-answers
probability-and-statistics
probability
expectation
+
–
0
votes
0
answers
2268
GATE ECE 2015 Set 3 | Question: 28
Consider the differential equation $\dfrac{\mathrm{d^{2}}x(t) }{\mathrm{d} t^{2}} +3\frac{\mathrm{d}x(t)}{\mathrm{d} t} + 2x(t) = 0. $ Given $x(0) = 20$ and $x(1) = 10/e,$ where $e = 2.718,$ the value of $x(2)$ is ________.
Consider the differential equation$$\dfrac{\mathrm{d^{2}}x(t) }{\mathrm{d} t^{2}} +3\frac{\mathrm{d}x(t)}{\mathrm{d} t} + 2x(t) = 0. $$Given $x(0) = 20$ and $x(1) = 10/e,...
Milicevic3306
16.0k
points
209
views
Milicevic3306
asked
Mar 27, 2018
Differential Equations
gate2015-ec-3
numerical-answers
differential-equations
+
–
0
votes
0
answers
2269
GATE ECE 2015 Set 3 | Question: 29
A vector field $\textbf{D} = 2\rho^{2}\:\textbf{a}_{\rho} + z\: \textbf{a}_{z}$ exists inside a cylindrical region enclosed by the surfaces $\rho =1,z = 0$ and $z = 5.$ Let $S$ be the surface bounding this cylindrical region. The surface integral of this field on $S(∯_{S} \textbf{D.ds})$ is _______.
A vector field $\textbf{D} = 2\rho^{2}\:\textbf{a}_{\rho} + z\: \textbf{a}_{z}$ exists inside a cylindrical region enclosed by the surfaces $\rho =1,z = 0$ and $z = 5.$ ...
Milicevic3306
16.0k
points
135
views
Milicevic3306
asked
Mar 27, 2018
Vector Analysis
gate2015-ec-3
numerical-answers
vector-analysis
+
–
0
votes
0
answers
2270
GATE ECE 2015 Set 3 | Question: 30
In the circuit shown, the current $I$ flowing through the $50\;\Omega$ resistor will be zero if the value of capacitor $C (\text{in}\: \mu F)$ is ______.
In the circuit shown, the current $I$ flowing through the $50\;\Omega$ resistor will be zero if the value of capacitor $C (\text{in}\: \mu F)$ is ______.
Milicevic3306
16.0k
points
87
views
Milicevic3306
asked
Mar 27, 2018
Electronic Devices
gate2015-ec-3
numerical-answers
electronic-devices
+
–
1
votes
0
answers
2271
GATE ECE 2015 Set 3 | Question: 31
The $ABCD$ parameters of the following $2$-port network are $\begin{bmatrix}3.5 + j2 & 20.5 \\ 20.5 & 3.5-j2 \end{bmatrix} \\$ $\begin{bmatrix}3.5 +j2 & 30.5 \\ 0.5&3.5-j2 \end{bmatrix} \\$ $\begin{bmatrix}10 &2+j0 \\2+j0 &10 \end{bmatrix} \\$ $\begin{bmatrix}7+j4 &0.5 \\ 30.5&7-j4 \end{bmatrix} $
The $ABCD$ parameters of the following $2$-port network are$\begin{bmatrix}3.5 + j2 & 20.5 \\ 20.5 & 3.5-j2 \end{bmatrix} \\$$\begin{bmatrix}3.5 +j2 & 30.5 \\ 0.5&3.5-j2 ...
Milicevic3306
16.0k
points
127
views
Milicevic3306
asked
Mar 27, 2018
Network Solution Methods
gate2015-ec-3
two-port-network
network-solution-methods
+
–
0
votes
0
answers
2272
GATE ECE 2015 Set 3 | Question: 32
A network is described by the state model as $\dot{x_{1}}=2x_{1}-x_{2}+3u \\ \dot{x_{2}}=-4x_{2}-u \\ y=3x_{1}-2x_{2}$ The transfer function $H(s)\left(=\dfrac{Y(s)}{U(s)}\right)$ is $\dfrac{11s+35}{(s-2)(s+4)} \\$ $\dfrac{11s-35}{(s-2)(s+4)} \\$ $\dfrac{11s+38}{(s-2)(s+4)} \\$ $\dfrac{11s-38}{(s-2)(s+4)}$
A network is described by the state model as $$\dot{x_{1}}=2x_{1}-x_{2}+3u \\ \dot{x_{2}}=-4x_{2}-u \\ y=3x_{1}-2x_{2}$$ The transfer function $H(s)\left(=\dfrac{Y(s)}{...
Milicevic3306
16.0k
points
98
views
Milicevic3306
asked
Mar 27, 2018
Network Solution Methods
gate2015-ec-3
transfer-function
network-solution-methods
+
–
0
votes
0
answers
2273
GATE ECE 2015 Set 3 | Question: 33
The electric field profile in the depletion region of a p-n junction in equilibrium is shown in the figure. Which one of the following statements is NOT TRUE? The left side of the junction is n-type and the right side is p-type Both the n-type and p-type depletion ... $10^{16}\: cm^{-3}$
The electric field profile in the depletion region of a p-n junction in equilibrium is shown in the figure. Which one of the following statements is NOT TRUE?The left sid...
Milicevic3306
16.0k
points
120
views
Milicevic3306
asked
Mar 27, 2018
Electronic Devices
gate2015-ec-3
electronic-devices
p-n-junction
+
–
1
votes
0
answers
2274
GATE ECE 2015 Set 3 | Question: 34
The current in an enhancement mode NMOS transistor biased in saturation mode was measured to be $1\: mA$ at a drain-source voltage of $5\: V.$ When the drain-source voltage was increased to $6\: V$ while keeping gate-source voltage same, the ... the applied drain-source voltage. The channel length modulation parameter $\lambda\:(\text{in}\: V^{-1})$ is _______.
The current in an enhancement mode NMOS transistor biased in saturation mode was measured to be $1\: mA$ at a drain-source voltage of $5\: V.$ When the drain-source volta...
Milicevic3306
16.0k
points
121
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
analog-circuits
nmos-transistor
+
–
0
votes
0
answers
2275
GATE ECE 2015 Set 3 | Question: 35
An npn BJT having reverse saturation current $I_{S} = 10^{-15}\:A$ is biased in the forward active region with $V_{BE} = 700\: mV.$ The thermal voltage $(V_{T})$ is $25\: mV$ and the current gain $(β)$ may vary from $50$ to $150$ due to manufacturing variations. The maximum emitter current $(\text{in}\: \mu A)$ is ________.
An npn BJT having reverse saturation current $I_{S} = 10^{-15}\:A$ is biased in the forward active region with $V_{BE} = 700\: mV.$ The thermal voltage $(V_{T})$ is $25\:...
Milicevic3306
16.0k
points
197
views
Milicevic3306
asked
Mar 27, 2018
Analog Circuits
gate2015-ec-3
numerical-answers
bipolar-junction-transistor
analog-circuits
+
–
0
votes
0
answers
2276
GATE ECE 2015 Set 3 | Question: 36
A three bit pseudo random number generator is shown. Initially the value of output $Y\equiv Y_{2} Y_{1} Y_{0}$ is set to $111.$ The value of output $Y$ after three clock cycles is $000$ $001$ $010$ $100$
A three bit pseudo random number generator is shown. Initially the value of output $Y\equiv Y_{2} Y_{1} Y_{0}$ is set to $111.$ The value of output $Y$ after three clock ...
Milicevic3306
16.0k
points
316
views
Milicevic3306
asked
Mar 27, 2018
Communications
gate2015-ec-3
communications
pseudo-random-number
+
–
0
votes
0
answers
2277
GATE ECE 2015 Set 3 | Question: 38
An SR latch is implemented using TTL gates as shown in the figure. The set and reset pulse inputs are provided using the push-button switches. It is observed that the circuit fails to work as desired. The SR latch can be made functional by changing NOR gates to NAND gates inverters to buffers NOR gates to NAND gates and inverters to buffers $5\: V$ to ground
An SR latch is implemented using TTL gates as shown in the figure. The set and reset pulse inputs are provided using the push-button switches. It is observed that the cir...
Milicevic3306
16.0k
points
194
views
Milicevic3306
asked
Mar 27, 2018
Number Representations
gate2015-ec-3
digital-circuits
sequential-circuit
flip-flops
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2278
GATE ECE 2015 Set 3 | Question: 39
In the circuit shown, assume that the opamp is ideal. If the gain $(v_{0} / v_{in})$ is $–12,$ the value of $R\: (\text{in}\: k\Omega)$ is _____.
In the circuit shown, assume that the opamp is ideal. If the gain $(v_{0} / v_{in})$ is $–12,$ the value of $R\: (\text{in}\: k\Omega)$ is _____.
Milicevic3306
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Milicevic3306
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Mar 27, 2018
Analog Circuits
gate2015-ec-3
analog-circuits
op-amps
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1
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0
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2279
GATE ECE 2015 Set 3 | Question: 40
In the circuit shown, both the enhancement mode NMOS transistors have the following characteristics:$k_{n} ݇ = \mu _{n}C_{ox}(W/L) = 1\:mA/V^{2};V_{TN} = 1V.$ Assume that the channel length modulation parameter $\lambda$ is zero ... supply voltage ܸ$V_{DD}$ (in volts) needed to ensure that transistor $M_{1}$ operates in saturation mode of operation is _______.
In the circuit shown, both the enhancement mode NMOS transistors have the following characteristics:$k_{n} ݇ = \mu _{n}C_{ox}(W/L) = 1\:mA/V^{2};V_{TN} = 1V.$ Assume tha...
Milicevic3306
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Milicevic3306
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Mar 27, 2018
Analog Circuits
gate2015-ec-3
numerical-answers
analog-circuits
nmos-transistor
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0
votes
0
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2280
GATE ECE 2015 Set 3 | Question: 41
In the circuit shown, assume that the diodes $D1$ and $D2$ are ideal. The average value of voltage $V_{ab}\: (\text{in Volts}),$ across terminals $‘a’$ and $‘b’$ is _________.
In the circuit shown, assume that the diodes $D1$ and $D2$ are ideal. The average value of voltage $V_{ab}\: (\text{in Volts}),$ across terminals $‘a’$ and $‘b’$ ...
Milicevic3306
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Milicevic3306
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Mar 27, 2018
Analog Circuits
gate2015-ec-3
numerical-answers
analog-circuits
diodes
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