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Questions by Milicevic3306
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81
GATE ECE 2016 Set 2 | Question: 6
In the circuit shown below, $V_{s}$ is a constant voltage source and $I_{L}$ is a constant current load. The value of $I_{L}$ that maximizes the power absorbed by the constant current load is $\frac{V_{S}}{4R} \\$ $\frac{V_{S}}{2R} \\$ $\frac{V_{S}}{R} \\$ $\infty$
In the circuit shown below, $V_{s}$ is a constant voltage source and $I_{L}$ is a constant current load. The value of $I_...
164
views
asked
Mar 27, 2018
Analog Circuits
gate2016-ec-2
analog-circuits
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0
votes
0
answers
82
GATE ECE 2016 Set 2 | Question: 7
The switch has been in position $1$ for a long time and abruptly changes to position $2$ at $t = 0$. If time $t$ is in seconds, the capacitor voltage $V_{C}$ (in volts) for $t > 0$ is given by $4\left ( 1- \text{ exp }\left ( -t/0.5 \right ) \right )$ ... $4\left ( 1-\text{ exp }\left ( -t/0.6 \right ) \right )$ $10 -6 \text{ exp }\left ( -t/0.6 \right )$
The switch has been in position $1$ for a long time and abruptly changes to position $2$ at $t = 0$. If time $t$ is in seconds, the...
123
views
asked
Mar 27, 2018
Analog Circuits
gate2016-ec-2
analog-circuits
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0
votes
0
answers
83
GATE ECE 2016 Set 2 | Question: 8
The figure shown an $RLC$ circuit with a sinusoidal current source. At resonance, the ratio $\mid I_{L} \mid / \mid I_{R} \mid$, i.e., the ratio of the magnitudes of the inductor current phasor and the resistor current phasor, is ________
The figure shown an $RLC$ circuit with a sinusoidal current source. At resonance, the ratio $\mid I_{L} \mid / \mid I_{R} \mid$, i...
217
views
asked
Mar 27, 2018
Network Solution Methods
gate2016-ec-2
numerical-answers
network-solution-methods
rlc-circuits
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0
votes
0
answers
84
GATE ECE 2016 Set 2 | Question: 9
The $z$-parameter matrix for the two-port network shown is $\begin{bmatrix} 2j\omega &j\omega \\ j\omega & 3+2j\omega \end{bmatrix},$ where the entries are in $\Omega$. Suppose $Z_{b}\left ( j\omega \right )=R_{b}+j\omega .$ Then the value of $R_{b}$ (in $\Omega$) equals ________
The $z$-parameter matrix for the two-port network shown is $$\begin{bmatrix} 2j\omega &j\omega \\ j\omega & 3+2j\omega \end{bmatrix},$$ where the entries are in $\Omega$...
122
views
asked
Mar 27, 2018
Control Systems
gate2016-ec-2
numerical-answers
control-systems
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0
votes
0
answers
85
GATE ECE 2016 Set 2 | Question: 10
The energy of the signal $x(t)= \frac{\sin(4\pi t)}{4\pi t}$ is ________
The energy of the signal $x(t)= \frac{\sin(4\pi t)}{4\pi t}$ is ________
170
views
asked
Mar 27, 2018
Continuous-time Signals
gate2016-ec-2
numerical-answers
continuous-time-signals
to-be-tagged
+
–
0
votes
0
answers
86
GATE ECE 2016 Set 2 | Question: 11
The Ebers-Moll model of a $BJT$ is valid only in active mode only in active and saturation modes only in active and cut-off modes in active, saturation and cut-off modes
The Ebers-Moll model of a $BJT$ is valid only in active modeonly in active and saturation modesonly in active and cut-off modesin active, saturation and cut-off modes
115
views
asked
Mar 27, 2018
Analog Circuits
gate2016-ec-2
analog-circuits
bipolar-junction-transistor
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0
votes
0
answers
87
GATE ECE 2016 Set 2 | Question: 12
A long-channel $NMOS$ transistor is biased in the linear region with $V_{DS}=50$ $m$ $V$ and is used as a resistance. Which one of the following statement is $NOT$ correct? If the device width $W$ is increased, the resistance ... decreases. If the device length $L$ is increased, the resistance increases. If $V_{GS}$ is incresed, the resistance increases.
A long-channel $NMOS$ transistor is biased in the linear region with $V_{DS}=50$ $m$ $V$ and is used as a resistance. Which one of the following statement is $NOT$ correc...
145
views
asked
Mar 27, 2018
Analog Circuits
gate2016-ec-2
analog-circuits
nmos-transistor
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0
votes
0
answers
88
GATE ECE 2016 Set 2 | Question: 13
Assume that the diode in the figure has $V_{on}=0.7 \:V$, but it otherwise ideal. The magnitude of the current $i_{2}$ in mA) is equal to _________
Assume that the diode in the figure has $V_{on}=0.7 \:V$, but it otherwise ideal. The magnitude of the current $i_{2}...
80
views
asked
Mar 27, 2018
Electronic Devices
gate2016-ec-2
numerical-answers
electronic-devices
+
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0
votes
0
answers
89
GATE ECE 2016 Set 2 | Question: 14
Resistor $R_{1}$ in the circuit below has been adjusted so that $I_{1}=1$ $mA$. The bipolar transistors $Q1$ and $Q2$ are perfectly matched and have very high current gain, so their base currents are negligible. The supply voltage $V_{cc}$ is $6$ $V$. The thermal ... $KT/q$ is $26$ $mV$. The value of $R_{2}$ (in $\Omega)$ for which $I_{2}=100\mu A$ is _________
Resistor $R_{1}$ in the circuit below has been adjusted so that $I_{1}=1$ $mA$. The bipolar transistors $Q1$ and $Q2$ are perfectly matched and have very high current gai...
140
views
asked
Mar 27, 2018
Electronic Devices
gate2016-ec-2
numerical-answers
electronic-devices
+
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0
votes
0
answers
90
GATE ECE 2016 Set 2 | Question: 15
Which one of the following statements is correct about an ac-coupled common-emitter amplifier operating in the mid-band region? The device parasitic capacitances behave like open circuits, whereas coupling and bypass capacitances ... The device parasitic capacitances behave like short circuits, whereas coupling and bypass capacitances behave like open circuits.
Which one of the following statements is correct about an ac-coupled common-emitter amplifier operating in the mid-band region?The device parasitic capacitances behave li...
168
views
asked
Mar 27, 2018
Analog Circuits
gate2016-ec-2
analog-circuits
amplifier
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0
votes
0
answers
91
GATE ECE 2016 Set 2 | Question: 16
Transistor geometries in a $CMOS$ inverter have been adjusted to meet the requirement for worst case charge and discharge times for driving a load capacitor $C$. This design is to be converted to that of a $NOR$ circuit in the same ... should not be changed. Widths of $PMOS$ transistors should be unchanged, while widths of $NMOS$ transistors should be halved.
Transistor geometries in a $CMOS$ inverter have been adjusted to meet the requirement for worst case charge and discharge times for driving a load capacitor $C$. This des...
165
views
asked
Mar 27, 2018
Electronic Devices
gate2016-ec-2
electronic-devices
cmos
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0
votes
0
answers
92
GATE ECE 2016 Set 2 | Question: 17
Assume that all the digital gates in the circuit shown in the figure are ideal, the resistor $R=10\Omega$ and the supply voltage is $5\:V$. The $D$ flip-flops $D_{1} \:, D_{2} \:, D_{3} \:, D_{4}$ and $D_{5}$ are initialized with ... $0$, respectively. The clocks has a $30\%$ duty cycle. The average power dissipated (in $mW$) in the resistor $R$ is _________
Assume that all the digital gates in the circuit shown in the figure are ideal, the resistor $R=10\Omega$ and the supply voltage is $5\:V$. The $D$ flip-flops $D_{1} \:, ...
385
views
asked
Mar 27, 2018
Number Representations
gate2016-ec-2
numerical-answers
digital-circuits
sequential-circuit
counters
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–
0
votes
0
answers
93
GATE ECE 2016 Set 2 | Question: 18
A $4:1$ multiplexer is to be used for generating the output carry of a full adder. $A$ and $B$ are the bits to be added while $C_{in}$ is the input carry and $C_{out}$ is the output carry. $A$ and $B$ are to be used as the select bits with $A$ being the more significant select ... $I_{3}=C_{in}$ $I_{0}=0, I_{1}=C_{in},I_{2}=1$ and $I_{3}=C_{in}$
A $4:1$ multiplexer is to be used for generating the output carry of a full adder. $A$ and $B$ are the bits to be added while $C_{in}$ is the input carry and $C_{out}$ is...
139
views
asked
Mar 27, 2018
Number Representations
gate2016-ec-2
digital-circuits
combinational-circuits
multiplexers
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–
0
votes
0
answers
94
GATE ECE 2016 Set 2 | Question: 19
The response of the system $G(s)=\frac{s-2}{(s+1)(s+3)}$ to the unit step input $u(t)$ is $y(t)$. The value of $\frac{dy}{dt}$ at $t=0^{+}$ is _________
The response of the system $G(s)=\frac{s-2}{(s+1)(s+3)}$ to the unit step input $u(t)$ is $y(t)$. The value of $\frac{dy}{dt}$ at $t=0^{+}$ is _________
99
views
asked
Mar 27, 2018
Differential Equations
gate2016-ec-2
numerical-answers
differential-equations
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0
votes
0
answers
95
GATE ECE 2016 Set 2 | Question: 20
The number and direction of encirclements around the point $-1+j0$ in the complex plane by the Nyquist plot of $G(s)=\frac{1-s}{4+2s}$ is zero. one,anti-clockwise. one, clockwise. two, clockwise.
The number and direction of encirclements around the point $-1+j0$ in the complex plane by the Nyquist plot of $G(s)=\frac{1-s}{4+2s}$ iszero.one,anti-clockwise.one, cloc...
160
views
asked
Mar 27, 2018
Control Systems
gate2016-ec-2
control-systems
nyquist
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0
votes
0
answers
96
GATE ECE 2016 Set 2 | Question: 21
A discrete memoryless source has an alphabet $\left \{ a_{1},a_{2}, a_{3},a_{4}\right \}$ with corresponding probabilities $\left \{ \frac{1}{2}, \frac{1}{4},\frac{1}{8},\frac{1}{8}\right \}.$ The minimum required average codeword length in bits to represent this source for error-free reconstruction is _________
A discrete memoryless source has an alphabet $\left \{ a_{1},a_{2}, a_{3},a_{4}\right \}$ with corresponding probabilities $\left \{ \frac{1}{2}, \frac{1}{4},\frac{1}{8},...
143
views
asked
Mar 27, 2018
Probability and Statistics
gate2016-ec-2
numerical-answers
probability-and-statistics
probability
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–
0
votes
0
answers
97
GATE ECE 2016 Set 2 | Question: 22
A speech signal is sampled at $8$ $kHz$ and encoded into $PCM$ format using $8$ bits/sample. The $PCM$ data is transmitted through a baseband channel via $4$-level $PAM$. The minimum bandwidth (in $kHz$) required for transmission is _________
A speech signal is sampled at $8$ $kHz$ and encoded into $PCM$ format using $8$ bits/sample. The $PCM$ data is transmitted through a baseband channel via $4$-level $PAM$....
109
views
asked
Mar 27, 2018
Communications
gate2016-ec-2
numerical-answers
digital-communications
pulse-code-modulation-systems
communications
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–
0
votes
0
answers
98
GATE ECE 2016 Set 2 | Question: 23
A uniform and constant magnetic field $\textbf{B}=\hat{z}B$ exists in the $\hat{z}$ direction in vacuum. A particle of mass $m$ with a small charge $q$ ... . Circular motion in the $xy$ plane. Linear motion in the $\hat{z}$ direction. Linear motion in the $\hat{x}$ direction.
A uniform and constant magnetic field $\textbf{B}=\hat{z}B$ exists in the $\hat{z}$ direction in vacuum. A particle of mass $m$ with a small charge $q$ is introduced into...
130
views
asked
Mar 27, 2018
Electromagnetics
gate2016-ec-2
electromagnetics
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0
votes
0
answers
99
GATE ECE 2016 Set 2 | Question: 24
Let the electric field vector of a plane electromagnetic wave propagating in a homogeneous medium be expressed as $\textbf{E}=\hat{x}E_{x}e^{-j(\omega t-\beta z)},$ where the propogation constant $\beta$ ... of the wave. The group velocity of the wave. The phase velocity of the wave. The power flux through the $z=0$ plane.
Let the electric field vector of a plane electromagnetic wave propagating in a homogeneous medium be expressed as $\textbf{E}=\hat{x}E_{x}e^{-j(\omega t-\beta z)},$ where...
136
views
asked
Mar 27, 2018
Electromagnetics
gate2016-ec-2
electromagnetics
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–
0
votes
0
answers
100
GATE ECE 2016 Set 2 | Question: 25
Light from free space is incident at an angle $\theta _{i}$ to the normal of the facet of a step-index large core optical fibre. The core and cladding refractive indices are $n _{1}=1.5$ and $n _{2}=1.4$, respectively. The maximum value of $\theta _{i}$ (in degrees) for which the incident light will be guided in the core of the fibre is _________
Light from free space is incident at an angle $\theta _{i}$ to the normal of the facet of a step-index large core optical fibre. The core and cladding refractive indices ...
188
views
asked
Mar 27, 2018
Electromagnetics
gate2016-ec-2
numerical-answers
electromagnetics
optical-fiber
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–
0
votes
0
answers
101
GATE ECE 2016 Set 2 | Question: 26
The ordinary differential equation $\frac{dx}{dt}=-3x+2, \text{ with }x(0) = 1$ is to be solved using the forward Euler method. The largest time step that can be used to solve the equation without making the numerical solution unstable is _________
The ordinary differential equation $$\frac{dx}{dt}=-3x+2, \text{ with }x(0) = 1$$ is to be solved using the forward Euler method. The largest time step that can be used t...
73
views
asked
Mar 27, 2018
Differential Equations
gate2016-ec-2
numerical-answers
differential-equations
+
–
0
votes
0
answers
102
GATE ECE 2016 Set 2 | Question: 27
Suppose $C$ is the closed curve defined as the circle $x^{2}+y^{2}=1$ with $C$ oreinted anti-clockwise. The value of $\oint$ ( $xy^{2}$ $dx$ + $ x^{2}y$ $dy$ )over the curve $C$ equals _________
Suppose $C$ is the closed curve defined as the circle $x^{2}+y^{2}=1$ with $C$ oreinted anti-clockwise. The value of $\oint$ ( $xy^{2}$ $dx$ + $ x^{2}y$ $dy$ )over the cu...
88
views
asked
Mar 27, 2018
Complex Analysis
gate2016-ec-2
numerical-answers
complex-analysis
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–
0
votes
0
answers
103
GATE ECE 2016 Set 2 | Question: 28
Two random variables $X$ and $Y$ are distributed according to $f_{X,Y}(x,y)=\begin{cases} (x+y),& 0\leq x\leq 1,&0\leq y\leq 1\\ 0, & \text{otherwise.} \end{cases}$ The probability $P(X+Y\leq 1)$ is ________
Two random variables $X$ and $Y$ are distributed according to $$f_{X,Y}(x,y)=\begin{cases} (x+y),& 0\leq x\leq 1,&0\leq y\leq 1\\ 0, & \text{otherwise.} \end{cases}$$ The...
183
views
asked
Mar 27, 2018
Probability and Statistics
gate2016-ec-2
numerical-answers
probability-and-statistics
probability
probability-density-function
+
–
0
votes
0
answers
104
GATE ECE 2016 Set 2 | Question: 29
The matrix $A=\begin{bmatrix} a & 0 &3 &7 \\ 2& 5&1 &3 \\ 0& 0& 2 &4 \\ 0&0 & 0 &b \end{bmatrix}$ has $\text{det}(A) = 100$ and $\text{trace}(A) = 14$. The value of $\mid a-b \mid$ is ________
The matrix $A=\begin{bmatrix} a & 0 &3 &7 \\ 2& 5&1 &3 \\ 0& 0& 2 &4 \\ 0&0 & 0 &b \end{bmatrix}$ has $\text{det}(A) = 100$ and $\text{trace}(A) = 14$. The value of $\mid...
135
views
asked
Mar 27, 2018
Linear Algebra
gate2016-ec-2
numerical-answers
linear-algebra
matrices
+
–
0
votes
0
answers
105
GATE ECE 2016 Set 2 | Question: 30
In the given circuit, each resistor has a value equal to $1\Omega$. What is the equivalent resistance across the terminals $a$ and $b$? $1/6 \: \Omega$ $1/3 \: \Omega$ $9/20 \: \Omega$ $8/15 \: \Omega$
In the given circuit, each resistor has a value equal to $1\Omega$. What is the equivalent resistance across the terminals $a$...
92
views
asked
Mar 27, 2018
Electronic Devices
gate2016-ec-2
electronic-devices
+
–
0
votes
0
answers
106
GATE ECE 2016 Set 2 | Question: 31
In the circuit shown in the figure, the magnitude of the current (in amperes) through $R_{2}$ is ____
In the circuit shown in the figure, the magnitude of the current (in amperes) through $R_{2}$ is ____
92
views
asked
Mar 27, 2018
Electronic Devices
gate2016-ec-2
numerical-answers
electronic-devices
+
–
0
votes
0
answers
107
GATE ECE 2016 Set 2 | Question: 32
A continuous-time filter with transfer function $H\left ( s \right )= \frac{2s+6}{s^{2}+6s+8}$ ... sampled at $2$ $Hz$, is identical at the sampling instants to the impulse response of the discrete time-filter. The value of $k$ is _________
A continuous-time filter with transfer function $H\left ( s \right )= \frac{2s+6}{s^{2}+6s+8}$ is converted to a discrete-time filter with transfer function $G\left ( z\r...
138
views
asked
Mar 27, 2018
Network Solution Methods
gate2016-ec-2
numerical-answers
network-solution-methods
transfer-function
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–
0
votes
0
answers
108
GATE ECE 2016 Set 2 | Question: 33
The Discrete Fourier Transform (DFT) of the $4$-point sequence $x\left [ n \right ]=\left \{ x\left [ 0 \right ],x\left [ 1 \right ], x\left [ 2 \right ], x\left [ 3 \right ] \right \}= \left \{ 3,2,3,4 \right \}$ ... $\left | \frac{X_{1}\left [ 8 \right ]}{X_{1}\left [ 11 \right ]} \right |$ is _________
The Discrete Fourier Transform (DFT) of the $4$-point sequence$x\left [ n \right ]=\left \{ x\left [ 0 \right ],x\left [ 1 \right ], x\left [ 2 \right ], x\left [ 3 \righ...
148
views
asked
Mar 27, 2018
Continuous-time Signals
gate2016-ec-2
numerical-answers
continuous-time-signals
discrete-fourier-transform
+
–
0
votes
0
answers
109
GATE ECE 2016 Set 2 | Question: 34
The switch $S$ in the circuit shown has been closed for a long time. It is opened at $t = 0$ and remains open after that. Assume that the diode has zero reverse current and zero forward voltage drop. The steady state magnitude of the capacitor voltage $V_{c}$ (in volts) is ______
The switch $S$ in the circuit shown has been closed for a long time. It is opened at $t = 0$ and remains open after that. Assume that the diode has zero reverse current a...
159
views
asked
Mar 27, 2018
Network Solution Methods
gate2016-ec-2
numerical-answers
network-solution-methods
diodes
steady-state
+
–
0
votes
0
answers
110
GATE ECE 2016 Set 2 | Question: 35
A voltage $V_{G}$ is applied across a $MOS$ capacitor with metal gate and $p$-type silicon substrate at $T=300$ $K$. The inversion carrier density (in number of carriers per unit area) for $V_{G}= 0.8$ $V$ is $2\times 10^{11} cm^{-2}.$ For $V_{G}= 1.3$ $V$, the ... $6.0\times 10^{11}cm^{-2}$ $7.2\times 10^{11}cm^{-2}$ $8.4\times 10^{11}cm^{-2}$
A voltage $V_{G}$ is applied across a $MOS$ capacitor with metal gate and $p$-type silicon substrate at $T=300$ $K$. The inversion carrier density (in number of carriers ...
83
views
asked
Mar 27, 2018
Electronic Devices
gate2016-ec-2
mos-capacitor
electronic-devices
+
–
0
votes
0
answers
111
GATE ECE 2016 Set 2 | Question: 36
Consider avalanche breakdown in a silicon $p^{+}n$ junction. The $n$-region is uniformly doped with a donor density $N_{D}.$ ... $N_{D}\times {V_{BR}}= \text{constant}$ $N_{D}/{V_{BR}}= \text{constant}$
Consider avalanche breakdown in a silicon $p^{+}n$ junction. The $n$-region is uniformly doped with a donor density $N_{D}.$ Assume that breakdown occurs when the magnitu...
180
views
asked
Mar 27, 2018
Electronic Devices
gate2016-ec-2
electronic-devices
p-n-junction
+
–
0
votes
0
answers
112
GATE ECE 2016 Set 2 | Question: 37
Consider a region of silicon devoid of electrons and holes, with an ionized donor density of $N_{d}^{+}=10^{17} cm^{-3}.$ The electric field at $x = 0$ is $0\: V/cm$ and the electric field at $x=L$ is $50$ $kV/cm$ in the positive $x$ direction, ... $\epsilon _{r}=11.7$ for silicon, the value of $L$ in $nm$ is ___________
Consider a region of silicon devoid of electrons and holes, with an ionized donor density of $N_{d}^{+}=10^{17} cm^{-3}.$ The electric field at $x = 0$ is $0\: V/cm$ and ...
167
views
asked
Mar 27, 2018
Electronic Devices
gate2016-ec-2
numerical-answers
electronic-devices
silicon
+
–
0
votes
0
answers
113
GATE ECE 2016 Set 2 | Question: 38
Consider a long-channel $NMOS$ transistor with source and body connected together. Assume that the electron mobility is independent of $V_{GS}$ and $V_{DS}.$ ... $and$ $g_{d}=\frac{\partial I_{D}}{\partial V_{DS}}$ The threshold voltage (in volts) of the transistor is _________
Consider a long-channel $NMOS$ transistor with source and body connected together. Assume that the electron mobility is independent of $V_{GS}$ and $V_{DS}.$ Given,$g_{m}...
221
views
asked
Mar 27, 2018
Analog Circuits
gate2016-ec-2
numerical-answers
analog-circuits
nmos-transistor
+
–
0
votes
0
answers
114
GATE ECE 2016 Set 2 | Question: 39
The figure shows a half-wave rectifier with a $475 \: \mu F$ filter capacitor. The load draws a constant current $I_{o}= 1 \: A$ from the rectifier. The figure also shows the input voltage $V_{i}$, the output voltage $V_{C}$ and the peak-to-peak voltage ... an amplitude of $10 \: V$ and a period of $1 \: ms$. The value of the ripple $u$ (in volts) is _________
The figure shows a half-wave rectifier with a $475 \: \mu F$ filter capacitor. The load draws a constant current $I_{o}= 1 \: A$ from the rectifier. The figure also shows...
316
views
asked
Mar 27, 2018
Electronic Devices
gate2016-ec-2
numerical-answers
electronic-devices
+
–
0
votes
0
answers
115
GATE ECE 2016 Set 2 | Question: 40
In the opamp circuit shown, the Zener diodes $Z1$ and $Z2$ clamp the output voltage $V_{0}$ to $+5V$ or $-5 V$. The switch $S$ is initially closed and is opened at time $t=0$. The time $t=t_{1}$ (in seconds) at which $V_{0}$ changes state is ________
In the opamp circuit shown, the Zener diodes $Z1$ and $Z2$ clamp the output voltage $V_{0}$ to $+5V$ or $-5 V$. The switch $S$ is initially closed and is opened at time $...
123
views
asked
Mar 27, 2018
Electronic Devices
gate2016-ec-2
numerical-answers
electronic-devices
zener-diode
+
–
0
votes
0
answers
116
GATE ECE 2016 Set 2 | Question: 41
An opamp has a finite open loop voltage gain of $100$. Its input offset voltage $V_{ios}(=+5mV)$ is modeled as shown in the circuit below. The amplifier is ideal in all other respects. $V_{\text{input}}$ is $25 \: mV$. The output voltage (in millivolts) is _________
An opamp has a finite open loop voltage gain of $100$. Its input offset voltage $V_{ios}(=+5mV)$ is modeled as shown in the circuit below. The amplifier is ideal in all o...
126
views
asked
Mar 27, 2018
Analog Circuits
gate2016-ec-2
numerical-answers
analog-circuits
op-amps
+
–
0
votes
0
answers
117
GATE ECE 2016 Set 2 | Question: 42
An $8$ Kbyte ROM with an active low Chip Select input $\left (\overline{CS}\right )$ is to be used in an $8085$ microprocessor based system. The ROM should occupy the address range $1000H$ to $2FFFH$. The address lines are designated as $A_{15}$ to $A_{0}$, ... $\overline{A_{15}}+ \overline{A_{14}}+A_{13} \cdot A_{12}$
An $8$ Kbyte ROM with an active low Chip Select input $\left (\overline{CS}\right )$ is to be used in an $8085$ microprocessor based system. The ROM should occupy the add...
99
views
asked
Mar 27, 2018
Digital Circuits
gate2016-ec-2
digital-circuits
microprocessor
rom
+
–
0
votes
0
answers
118
GATE ECE 2016 Set 2 | Question: 43
In an $N$ bit flash ADC, the analog voltage is fed simultaneously to $2^{N}-1$ comparators. The output of the comparators is then encoded to a binary format using digital circuits. Assume that the analog voltage source $V_{in}$ ... maximum sampling rate? $1$ megasamples per second $6$ megasamples per second $64$ megasamples per second $256$ megasamples per second
In an $N$ bit flash ADC, the analog voltage is fed simultaneously to $2^{N}-1$ comparators. The output of the comparators is then encoded to a binary format using digita...
227
views
asked
Mar 27, 2018
Number Representations
gate2016-ec-2
digital-circuits
analog-to-digital-converter
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–
0
votes
0
answers
119
GATE ECE 2016 Set 2 | Question: 44
The state transition diagram for a finite state machine with states $A$, $B$ and $C$, and binary inputs $X$, $Y$ and $Z$, is shown in the figure. Which one of the following statements is correct? Transitions from State ... State $B$ are ambiguously defined. Transitions from State $C$ are ambiguously defined. All of the state transitions are defined unambiguously.
The state transition diagram for a finite state machine with states $A$, $B$ and $C$, and binary inputs $X$, $Y$ and $Z$, is shown in the figure. ...
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Mar 27, 2018
Digital Circuits
gate2016-ec-2
digital-circuits
state-transition-diagram
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0
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0
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120
GATE ECE 2016 Set 2 | Question: 45
In the feedback system shown below $G\left ( s \right )=\frac{1}{\left ( s^{2}+2s \right )}$. The step response of the closed-loop system should have minimum settling time and have no overshoot. The required value of gain $k$ to achieve this is __________
In the feedback system shown below $G\left ( s \right )=\frac{1}{\left ( s^{2}+2s \right )}$. The step response of the closed-loop system should have minimum settling tim...
105
views
asked
Mar 27, 2018
Analog Circuits
gate2016-ec-2
numerical-answers
analog-circuits
feedback
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